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https://github.com/c64scene-ar/llvm-6502.git
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b503b49b51
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
72 lines
1.8 KiB
LLVM
72 lines
1.8 KiB
LLVM
; Test multiplication of two f32s, producing an f32 result.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check register multiplication.
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define float @f1(float %f1, float %f2) {
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; CHECK: f1:
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; CHECK: meebr %f0, %f2
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; CHECK: br %r14
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%res = fmul float %f1, %f2
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ret float %res
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}
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; Check the low end of the MEEB range.
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define float @f2(float %f1, float *%ptr) {
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; CHECK: f2:
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; CHECK: meeb %f0, 0(%r2)
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; CHECK: br %r14
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%f2 = load float *%ptr
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%res = fmul float %f1, %f2
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ret float %res
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}
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; Check the high end of the aligned MEEB range.
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define float @f3(float %f1, float *%base) {
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; CHECK: f3:
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; CHECK: meeb %f0, 4092(%r2)
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 1023
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%f2 = load float *%ptr
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%res = fmul float %f1, %f2
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ret float %res
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}
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; Check the next word up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define float @f4(float %f1, float *%base) {
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; CHECK: f4:
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; CHECK: aghi %r2, 4096
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; CHECK: meeb %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 1024
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%f2 = load float *%ptr
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%res = fmul float %f1, %f2
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ret float %res
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}
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; Check negative displacements, which also need separate address logic.
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define float @f5(float %f1, float *%base) {
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; CHECK: f5:
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; CHECK: aghi %r2, -4
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; CHECK: meeb %f0, 0(%r2)
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; CHECK: br %r14
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%ptr = getelementptr float *%base, i64 -1
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%f2 = load float *%ptr
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%res = fmul float %f1, %f2
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ret float %res
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}
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; Check that MEEB allows indices.
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define float @f6(float %f1, float *%base, i64 %index) {
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; CHECK: f6:
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; CHECK: sllg %r1, %r3, 2
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; CHECK: meeb %f0, 400(%r1,%r2)
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; CHECK: br %r14
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%ptr1 = getelementptr float *%base, i64 %index
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%ptr2 = getelementptr float *%ptr1, i64 100
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%f2 = load float *%ptr2
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%res = fmul float %f1, %f2
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ret float %res
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}
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