Stepan Dyatkovskiy b52ba9f8a8 Issue: ... Stack is formed improperly for long structures passed as byval arguments for EABI mode. If we took AAPCS reference, we can found the next statements: A: "If the argument requires double-word alignment (8-byte), the NCRN (Next Core Register Number) is rounded up to the next even register number." (5.5 Parameter Passing, Stage C, C.3). B: "The alignment of an aggregate shall be the alignment of its most-aligned component." (4.3 Composite Types, 4.3.1 Aggregates). So if we have structure with doubles (9 double fields) and 3 Core unused registers (r1, r2, r3): caller should use r2 and r3 registers only. Currently r1,r2,r3 set is used, but it is invalid. Callee VA routine should also use r2 and r3 regs only. All is ok here. This behaviour is guessed by rounding up SP address with ADD+BFC operations. Fix: Main fix is in ARMTargetLowering::HandleByVal. If we detected AAPCS mode and 8 byte alignment, we waste odd registers then. P.S.: I also improved LDRB_POST_IMM regression test. Since ldrb instruction will not generated by current regression test after this patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@166018 91177308-0d34-0410-b5e6-96231b3b80d8		2012-10-16 07:16:47 +00:00
..
Analysis	Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis.	2012-10-15 16:24:29 +00:00
Archive	Mark checkSignature const, and in turn stop casting away const from	2012-09-05 22:09:23 +00:00
AsmParser	Move the Attributes::Builder outside of the Attributes class and into its own class named AttrBuilder. No functionality change.	2012-10-15 20:35:56 +00:00
Bitcode	Move the Attributes::Builder outside of the Attributes class and into its own class named AttrBuilder. No functionality change.	2012-10-15 20:35:56 +00:00
CodeGen	Issue:	2012-10-16 07:16:47 +00:00
DebugInfo	Mark unimplemented copy constructors and copy assignment operators as LLVM_DELETED_FUNCTION.	2012-09-18 02:01:41 +00:00
ExecutionEngine	Resubmit the changes to llvm core to update the functions to support different pointer sizes on a per address space basis.	2012-10-15 16:24:29 +00:00
Linker
MC	[ms-inline asm] If we parsed a statement and the opcode is valid, then it's an instruction.	2012-10-15 19:08:18 +00:00
Object	Cosmetic changes	2012-10-10 01:45:52 +00:00
Support	Add powerpc-ibm-aix to Triple. Patch by Kai.	2012-10-12 11:08:57 +00:00
TableGen	tblgen: Compile TableGen without RTTI.	2012-10-10 20:27:18 +00:00
Target	Issue:	2012-10-16 07:16:47 +00:00
Transforms	Use the Attributes::get method which takes an AttrVal value directly to simplify the code a bit. No functionality change.	2012-10-16 05:23:31 +00:00
VMCore	Cleanup whitespace.	2012-10-16 06:10:45 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile