llvm-6502/test/CodeGen
Dan Gohman b55d6b6a7e Fix fast-isel address mode folding to avoid folding instructions
outside of the current basic block. This fixes PR9500, rdar://9156159.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@128041 91177308-0d34-0410-b5e6-96231b3b80d8
2011-03-22 00:04:35 +00:00
..
Alpha If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
ARM Write the section table and the section data in the same order that 2011-03-20 18:44:20 +00:00
Blackfin Be nice to Xcore and the XMOS assembler and avoid quoting section names 2011-03-04 20:03:14 +00:00
CBackend
CellSPU Roll r127459 back in: 2011-03-11 21:52:04 +00:00
CPP
Generic Make this test x86 specific because the ARM backend can't handle it. 2011-02-28 12:30:47 +00:00
MBlaze fix visitShift to properly zero extend the shift amount if the provided operand 2011-02-13 09:02:52 +00:00
Mips Revert "Re-enable test and hope to silence the buildbots", still broken. 2011-03-09 22:48:46 +00:00
MSP430 Enhance ComputeMaskedBits to know that aligned frameindexes 2011-02-13 22:25:43 +00:00
PowerPC Fix mistyped CHECK lines. 2011-03-09 22:07:31 +00:00
PTX PTX: Fix various codegen issues 2011-03-18 19:24:28 +00:00
SPARC Generate correct Sparc32 ABI compliant code for functions that return a struct. 2011-02-21 03:42:44 +00:00
SystemZ If dbg_declare() or dbg_value() is not lowered by isel then emit DEBUG message instead of creating DBG_VALUE for undefined value in reg0. 2010-12-06 22:39:26 +00:00
Thumb Roll r127459 back in: 2011-03-11 21:52:04 +00:00
Thumb2 Roll r127459 back in: 2011-03-11 21:52:04 +00:00
X86 Fix fast-isel address mode folding to avoid folding instructions 2011-03-22 00:04:35 +00:00
XCore Add XCore intrinsic for setpsc. 2011-03-17 18:42:05 +00:00