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b58f498f75
a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8 |
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.. | ||
AsmPrinter | ||
TargetInfo | ||
CMakeLists.txt | ||
Makefile | ||
Mips.h | ||
Mips.td | ||
MipsCallingConv.td | ||
MipsDelaySlotFiller.cpp | ||
MipsInstrFormats.td | ||
MipsInstrFPU.td | ||
MipsInstrInfo.cpp | ||
MipsInstrInfo.h | ||
MipsInstrInfo.td | ||
MipsISelDAGToDAG.cpp | ||
MipsISelLowering.cpp | ||
MipsISelLowering.h | ||
MipsMachineFunction.h | ||
MipsMCAsmInfo.cpp | ||
MipsMCAsmInfo.h | ||
MipsRegisterInfo.cpp | ||
MipsRegisterInfo.h | ||
MipsRegisterInfo.td | ||
MipsSchedule.td | ||
MipsSubtarget.cpp | ||
MipsSubtarget.h | ||
MipsTargetMachine.cpp | ||
MipsTargetMachine.h | ||
MipsTargetObjectFile.cpp | ||
MipsTargetObjectFile.h |