Richard Barton b56e4115ed Unify internal representation of ARM instructions with a register right-shifted by #32. These are stored as shifts by #0 in the MCInst and correctly marshalled when transforming from or to assembly representation. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@155565 91177308-0d34-0410-b5e6-96231b3b80d8		2012-04-25 18:00:18 +00:00
..
Analysis	Fix a crash on valid (if UB) bitcode that is produced for some global	2012-04-24 18:42:47 +00:00
Archive
AsmParser
Bitcode
CodeGen	Remove the -disable-cross-class-join option.	2012-04-25 16:17:50 +00:00
DebugInfo	Fix a C++11 UDL conflict.	2012-04-04 20:33:56 +00:00
ExecutionEngine	Fix incorrect call of resolveRelocation() for ARM ELF stub relocations.	2012-04-17 20:10:16 +00:00
Linker	Add a flag to the struct type finder to collect only those types which have	2012-04-21 23:59:16 +00:00
MC	MC assembly parser handling for trailing comma in macro instantiation.	2012-04-16 21:18:49 +00:00
Object	Implement GDB integration for source level debugging of code JITed using	2012-04-16 22:12:58 +00:00
Support	Add a missing cpu subtype.	2012-04-23 22:41:39 +00:00
TableGen	Fix copy/paste-o.	2012-04-18 18:09:53 +00:00
Target	Unify internal representation of ARM instructions with a register right-shifted by #32. These are stored as shifts by #0 in the MCInst and correctly marshalled when transforming from or to assembly representation.	2012-04-25 18:00:18 +00:00
Transforms	Reverting r155468. Chris and Chandler have convinced me that it's dangerous and	2012-04-25 02:16:54 +00:00
VMCore	ConstantFoldSelectInstruction swapped the operands of the select.	2012-04-24 20:18:49 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile