mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-11-19 01:13:25 +00:00
be8cc2a3de
Massive check in. This changes the "-fast" flag to "-O#" in llc. If you want to use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'll change the JIT with a follow-up patch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70343 91177308-0d34-0410-b5e6-96231b3b80d8
621 lines
20 KiB
C++
621 lines
20 KiB
C++
//===-- SPUAsmPrinter.cpp - Print machine instrs to Cell SPU assembly -------=//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains a printer that converts from our internal representation
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// of machine-dependent LLVM code to Cell SPU assembly language. This printer
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// is the output mechanism used by `llc'.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asmprinter"
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#include "SPU.h"
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#include "SPUTargetMachine.h"
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#include "llvm/Constants.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Module.h"
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#include "llvm/Assembly/Writer.h"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/CodeGen/DwarfWriter.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineFunctionPass.h"
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#include "llvm/CodeGen/MachineInstr.h"
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#include "llvm/Support/Mangler.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/Target/TargetAsmInfo.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/ADT/StringExtras.h"
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#include <set>
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using namespace llvm;
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namespace {
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STATISTIC(EmittedInsts, "Number of machine instrs printed");
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const std::string bss_section(".bss");
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class VISIBILITY_HIDDEN SPUAsmPrinter : public AsmPrinter {
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std::set<std::string> FnStubs, GVStubs;
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public:
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explicit SPUAsmPrinter(raw_ostream &O, TargetMachine &TM,
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const TargetAsmInfo *T, unsigned OL, bool V) :
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AsmPrinter(O, TM, T, OL, V) {}
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virtual const char *getPassName() const {
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return "STI CBEA SPU Assembly Printer";
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}
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SPUTargetMachine &getTM() {
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return static_cast<SPUTargetMachine&>(TM);
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}
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/// printInstruction - This method is automatically generated by tablegen
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/// from the instruction set description. This method returns true if the
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/// machine instruction was sufficiently described to print it, otherwise it
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/// returns false.
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bool printInstruction(const MachineInstr *MI);
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void printMachineInstruction(const MachineInstr *MI);
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void printOp(const MachineOperand &MO);
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/// printRegister - Print register according to target requirements.
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///
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void printRegister(const MachineOperand &MO, bool R0AsZero) {
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unsigned RegNo = MO.getReg();
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assert(TargetRegisterInfo::isPhysicalRegister(RegNo) &&
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"Not physreg??");
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O << TM.getRegisterInfo()->get(RegNo).AsmName;
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}
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void printOperand(const MachineInstr *MI, unsigned OpNo) {
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const MachineOperand &MO = MI->getOperand(OpNo);
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if (MO.isReg()) {
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assert(TargetRegisterInfo::isPhysicalRegister(MO.getReg())&&"Not physreg??");
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O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
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} else if (MO.isImm()) {
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O << MO.getImm();
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} else {
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printOp(MO);
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}
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}
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bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant, const char *ExtraCode);
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void
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printS7ImmOperand(const MachineInstr *MI, unsigned OpNo)
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{
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int value = MI->getOperand(OpNo).getImm();
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value = (value << (32 - 7)) >> (32 - 7);
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assert((value >= -(1 << 8) && value <= (1 << 7) - 1)
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&& "Invalid s7 argument");
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O << value;
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}
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void
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printU7ImmOperand(const MachineInstr *MI, unsigned OpNo)
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{
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unsigned int value = MI->getOperand(OpNo).getImm();
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assert(value < (1 << 8) && "Invalid u7 argument");
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O << value;
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}
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void
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printShufAddr(const MachineInstr *MI, unsigned OpNo)
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{
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char value = MI->getOperand(OpNo).getImm();
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O << (int) value;
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O << "(";
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printOperand(MI, OpNo+1);
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O << ")";
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}
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void
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printS16ImmOperand(const MachineInstr *MI, unsigned OpNo)
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{
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O << (short) MI->getOperand(OpNo).getImm();
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}
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void
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printU16ImmOperand(const MachineInstr *MI, unsigned OpNo)
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{
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O << (unsigned short)MI->getOperand(OpNo).getImm();
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}
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void
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printU32ImmOperand(const MachineInstr *MI, unsigned OpNo)
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{
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O << (unsigned)MI->getOperand(OpNo).getImm();
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}
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void
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printMemRegReg(const MachineInstr *MI, unsigned OpNo) {
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// When used as the base register, r0 reads constant zero rather than
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// the value contained in the register. For this reason, the darwin
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// assembler requires that we print r0 as 0 (no r) when used as the base.
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const MachineOperand &MO = MI->getOperand(OpNo);
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O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
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O << ", ";
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printOperand(MI, OpNo+1);
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}
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void
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printU18ImmOperand(const MachineInstr *MI, unsigned OpNo)
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{
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unsigned int value = MI->getOperand(OpNo).getImm();
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assert(value <= (1 << 19) - 1 && "Invalid u18 argument");
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O << value;
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}
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void
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printS10ImmOperand(const MachineInstr *MI, unsigned OpNo)
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{
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short value = (short) (((int) MI->getOperand(OpNo).getImm() << 16)
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>> 16);
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assert((value >= -(1 << 9) && value <= (1 << 9) - 1)
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&& "Invalid s10 argument");
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O << value;
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}
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void
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printU10ImmOperand(const MachineInstr *MI, unsigned OpNo)
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{
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short value = (short) (((int) MI->getOperand(OpNo).getImm() << 16)
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>> 16);
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assert((value <= (1 << 10) - 1) && "Invalid u10 argument");
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O << value;
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}
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void
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printDFormAddr(const MachineInstr *MI, unsigned OpNo)
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{
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assert(MI->getOperand(OpNo).isImm() &&
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"printDFormAddr first operand is not immediate");
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int64_t value = int64_t(MI->getOperand(OpNo).getImm());
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int16_t value16 = int16_t(value);
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assert((value16 >= -(1 << (9+4)) && value16 <= (1 << (9+4)) - 1)
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&& "Invalid dform s10 offset argument");
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O << (value16 & ~0xf) << "(";
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printOperand(MI, OpNo+1);
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O << ")";
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}
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void
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printAddr256K(const MachineInstr *MI, unsigned OpNo)
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{
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/* Note: operand 1 is an offset or symbol name. */
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if (MI->getOperand(OpNo).isImm()) {
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printS16ImmOperand(MI, OpNo);
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} else {
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printOp(MI->getOperand(OpNo));
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if (MI->getOperand(OpNo+1).isImm()) {
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int displ = int(MI->getOperand(OpNo+1).getImm());
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if (displ > 0)
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O << "+" << displ;
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else if (displ < 0)
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O << displ;
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}
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}
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}
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void printCallOperand(const MachineInstr *MI, unsigned OpNo) {
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printOp(MI->getOperand(OpNo));
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}
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void printPCRelativeOperand(const MachineInstr *MI, unsigned OpNo) {
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// Used to generate a ".-<target>", but it turns out that the assembler
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// really wants the target.
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//
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// N.B.: This operand is used for call targets. Branch hints are another
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// animal entirely.
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printOp(MI->getOperand(OpNo));
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}
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void printHBROperand(const MachineInstr *MI, unsigned OpNo) {
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// HBR operands are generated in front of branches, hence, the
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// program counter plus the target.
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O << ".+";
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printOp(MI->getOperand(OpNo));
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}
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void printSymbolHi(const MachineInstr *MI, unsigned OpNo) {
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if (MI->getOperand(OpNo).isImm()) {
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printS16ImmOperand(MI, OpNo);
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} else {
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printOp(MI->getOperand(OpNo));
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O << "@h";
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}
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}
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void printSymbolLo(const MachineInstr *MI, unsigned OpNo) {
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if (MI->getOperand(OpNo).isImm()) {
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printS16ImmOperand(MI, OpNo);
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} else {
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printOp(MI->getOperand(OpNo));
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O << "@l";
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}
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}
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/// Print local store address
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void printSymbolLSA(const MachineInstr *MI, unsigned OpNo) {
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printOp(MI->getOperand(OpNo));
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}
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void printROTHNeg7Imm(const MachineInstr *MI, unsigned OpNo) {
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if (MI->getOperand(OpNo).isImm()) {
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int value = (int) MI->getOperand(OpNo).getImm();
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assert((value >= 0 && value < 16)
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&& "Invalid negated immediate rotate 7-bit argument");
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O << -value;
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} else {
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assert(0 &&"Invalid/non-immediate rotate amount in printRotateNeg7Imm");
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}
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}
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void printROTNeg7Imm(const MachineInstr *MI, unsigned OpNo) {
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if (MI->getOperand(OpNo).isImm()) {
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int value = (int) MI->getOperand(OpNo).getImm();
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assert((value >= 0 && value <= 32)
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&& "Invalid negated immediate rotate 7-bit argument");
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O << -value;
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} else {
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assert(0 &&"Invalid/non-immediate rotate amount in printRotateNeg7Imm");
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}
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}
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virtual bool runOnMachineFunction(MachineFunction &F) = 0;
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//! Assembly printer cleanup after function has been emitted
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virtual bool doFinalization(Module &M) = 0;
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};
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/// LinuxAsmPrinter - SPU assembly printer, customized for Linux
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class VISIBILITY_HIDDEN LinuxAsmPrinter : public SPUAsmPrinter {
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DwarfWriter *DW;
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MachineModuleInfo *MMI;
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public:
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LinuxAsmPrinter(raw_ostream &O, SPUTargetMachine &TM,
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const TargetAsmInfo *T, bool F, bool V)
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: SPUAsmPrinter(O, TM, T, F, V), DW(0), MMI(0) {}
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virtual const char *getPassName() const {
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return "STI CBEA SPU Assembly Printer";
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}
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bool runOnMachineFunction(MachineFunction &F);
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bool doInitialization(Module &M);
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//! Dump globals, perform cleanup after function emission
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bool doFinalization(Module &M);
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.setPreservesAll();
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AU.addRequired<MachineModuleInfo>();
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AU.addRequired<DwarfWriter>();
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SPUAsmPrinter::getAnalysisUsage(AU);
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}
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//! Emit a global variable according to its section and type
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void printModuleLevelGV(const GlobalVariable* GVar);
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};
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} // end of anonymous namespace
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// Include the auto-generated portion of the assembly writer
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#include "SPUGenAsmWriter.inc"
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void SPUAsmPrinter::printOp(const MachineOperand &MO) {
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switch (MO.getType()) {
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case MachineOperand::MO_Immediate:
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cerr << "printOp() does not handle immediate values\n";
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abort();
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return;
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case MachineOperand::MO_MachineBasicBlock:
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printBasicBlockLabel(MO.getMBB());
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return;
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case MachineOperand::MO_JumpTableIndex:
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O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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return;
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case MachineOperand::MO_ConstantPoolIndex:
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O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
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<< '_' << MO.getIndex();
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return;
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case MachineOperand::MO_ExternalSymbol:
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// Computing the address of an external symbol, not calling it.
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if (TM.getRelocationModel() != Reloc::Static) {
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std::string Name(TAI->getGlobalPrefix()); Name += MO.getSymbolName();
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GVStubs.insert(Name);
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O << "L" << Name << "$non_lazy_ptr";
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return;
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}
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O << TAI->getGlobalPrefix() << MO.getSymbolName();
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return;
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case MachineOperand::MO_GlobalAddress: {
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// Computing the address of a global symbol, not calling it.
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GlobalValue *GV = MO.getGlobal();
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std::string Name = Mang->getValueName(GV);
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// External or weakly linked global variables need non-lazily-resolved
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// stubs
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if (TM.getRelocationModel() != Reloc::Static) {
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if (((GV->isDeclaration() || GV->hasWeakLinkage() ||
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GV->hasLinkOnceLinkage() || GV->hasCommonLinkage()))) {
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GVStubs.insert(Name);
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O << "L" << Name << "$non_lazy_ptr";
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return;
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}
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}
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O << Name;
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if (GV->hasExternalWeakLinkage())
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ExtWeakSymbols.insert(GV);
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return;
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}
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default:
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O << "<unknown operand type: " << MO.getType() << ">";
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return;
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}
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}
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/// PrintAsmOperand - Print out an operand for an inline asm expression.
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///
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bool SPUAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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// Does this asm operand have a single letter operand modifier?
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if (ExtraCode && ExtraCode[0]) {
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if (ExtraCode[1] != 0) return true; // Unknown modifier.
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switch (ExtraCode[0]) {
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default: return true; // Unknown modifier.
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case 'L': // Write second word of DImode reference.
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// Verify that this operand has two consecutive registers.
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if (!MI->getOperand(OpNo).isReg() ||
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OpNo+1 == MI->getNumOperands() ||
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!MI->getOperand(OpNo+1).isReg())
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return true;
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++OpNo; // Return the high-part.
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break;
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}
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}
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printOperand(MI, OpNo);
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return false;
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}
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bool SPUAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
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unsigned OpNo,
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unsigned AsmVariant,
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const char *ExtraCode) {
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if (ExtraCode && ExtraCode[0])
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return true; // Unknown modifier.
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printMemRegReg(MI, OpNo);
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return false;
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}
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/// printMachineInstruction -- Print out a single PowerPC MI in Darwin syntax
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/// to the current output stream.
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///
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void SPUAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
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++EmittedInsts;
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printInstruction(MI);
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}
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/// runOnMachineFunction - This uses the printMachineInstruction()
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/// method to print assembly for each instruction.
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///
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bool
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LinuxAsmPrinter::runOnMachineFunction(MachineFunction &MF)
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{
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this->MF = &MF;
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SetupMachineFunction(MF);
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O << "\n\n";
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// Print out constants referenced by the function
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EmitConstantPool(MF.getConstantPool());
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// Print out labels for the function.
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const Function *F = MF.getFunction();
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SwitchToSection(TAI->SectionForGlobal(F));
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EmitAlignment(3, F);
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switch (F->getLinkage()) {
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default: assert(0 && "Unknown linkage type!");
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case Function::PrivateLinkage:
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case Function::InternalLinkage: // Symbols default to internal.
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break;
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case Function::ExternalLinkage:
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O << "\t.global\t" << CurrentFnName << "\n"
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<< "\t.type\t" << CurrentFnName << ", @function\n";
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break;
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case Function::WeakAnyLinkage:
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case Function::WeakODRLinkage:
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case Function::LinkOnceAnyLinkage:
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case Function::LinkOnceODRLinkage:
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O << "\t.global\t" << CurrentFnName << "\n";
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O << "\t.weak_definition\t" << CurrentFnName << "\n";
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break;
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}
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O << CurrentFnName << ":\n";
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// Emit pre-function debug information.
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DW->BeginFunction(&MF);
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// Print out code for the function.
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for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
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I != E; ++I) {
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// Print a label for the basic block.
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if (I != MF.begin()) {
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printBasicBlockLabel(I, true, true);
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O << '\n';
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}
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for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
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II != E; ++II) {
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// Print the assembly for the instruction.
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printMachineInstruction(II);
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}
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}
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O << "\t.size\t" << CurrentFnName << ",.-" << CurrentFnName << "\n";
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// Print out jump tables referenced by the function.
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EmitJumpTableInfo(MF.getJumpTableInfo(), MF);
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// Emit post-function debug information.
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DW->EndFunction(&MF);
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// We didn't modify anything.
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return false;
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}
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bool LinuxAsmPrinter::doInitialization(Module &M) {
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bool Result = AsmPrinter::doInitialization(M);
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SwitchToTextSection("\t.text");
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// Emit initial debug information.
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DW = getAnalysisIfAvailable<DwarfWriter>();
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assert(DW && "Dwarf Writer is not available");
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MMI = getAnalysisIfAvailable<MachineModuleInfo>();
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DW->BeginModule(&M, MMI, O, this, TAI);
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return Result;
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}
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|
|
|
/// PrintUnmangledNameSafely - Print out the printable characters in the name.
|
|
/// Don't print things like \\n or \\0.
|
|
static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
|
|
for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
|
|
Name != E; ++Name)
|
|
if (isprint(*Name))
|
|
OS << *Name;
|
|
}
|
|
|
|
/*!
|
|
Emit a global variable according to its section, alignment, etc.
|
|
|
|
\note This code was shamelessly copied from the PowerPC's assembly printer,
|
|
which sort of screams for some kind of refactorization of common code.
|
|
*/
|
|
void LinuxAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
|
|
const TargetData *TD = TM.getTargetData();
|
|
|
|
if (!GVar->hasInitializer())
|
|
return;
|
|
|
|
// Check to see if this is a special global used by LLVM, if so, emit it.
|
|
if (EmitSpecialLLVMGlobal(GVar))
|
|
return;
|
|
|
|
std::string name = Mang->getValueName(GVar);
|
|
|
|
printVisibility(name, GVar->getVisibility());
|
|
|
|
Constant *C = GVar->getInitializer();
|
|
const Type *Type = C->getType();
|
|
unsigned Size = TD->getTypePaddedSize(Type);
|
|
unsigned Align = TD->getPreferredAlignmentLog(GVar);
|
|
|
|
SwitchToSection(TAI->SectionForGlobal(GVar));
|
|
|
|
if (C->isNullValue() && /* FIXME: Verify correct */
|
|
!GVar->hasSection() &&
|
|
(GVar->hasLocalLinkage() || GVar->hasExternalLinkage() ||
|
|
GVar->isWeakForLinker())) {
|
|
if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
|
|
|
|
if (GVar->hasExternalLinkage()) {
|
|
O << "\t.global " << name << '\n';
|
|
O << "\t.type " << name << ", @object\n";
|
|
O << name << ":\n";
|
|
O << "\t.zero " << Size << '\n';
|
|
} else if (GVar->hasLocalLinkage()) {
|
|
O << TAI->getLCOMMDirective() << name << ',' << Size;
|
|
} else {
|
|
O << ".comm " << name << ',' << Size;
|
|
}
|
|
O << "\t\t" << TAI->getCommentString() << " '";
|
|
PrintUnmangledNameSafely(GVar, O);
|
|
O << "'\n";
|
|
return;
|
|
}
|
|
|
|
switch (GVar->getLinkage()) {
|
|
// Should never be seen for the CellSPU platform...
|
|
case GlobalValue::LinkOnceAnyLinkage:
|
|
case GlobalValue::LinkOnceODRLinkage:
|
|
case GlobalValue::WeakAnyLinkage:
|
|
case GlobalValue::WeakODRLinkage:
|
|
case GlobalValue::CommonLinkage:
|
|
O << "\t.global " << name << '\n'
|
|
<< "\t.type " << name << ", @object\n"
|
|
<< "\t.weak " << name << '\n';
|
|
break;
|
|
case GlobalValue::AppendingLinkage:
|
|
// FIXME: appending linkage variables should go into a section of
|
|
// their name or something. For now, just emit them as external.
|
|
case GlobalValue::ExternalLinkage:
|
|
// If external or appending, declare as a global symbol
|
|
O << "\t.global " << name << '\n'
|
|
<< "\t.type " << name << ", @object\n";
|
|
// FALL THROUGH
|
|
case GlobalValue::PrivateLinkage:
|
|
case GlobalValue::InternalLinkage:
|
|
break;
|
|
default:
|
|
cerr << "Unknown linkage type!";
|
|
abort();
|
|
}
|
|
|
|
EmitAlignment(Align, GVar);
|
|
O << name << ":\t\t\t\t" << TAI->getCommentString() << " '";
|
|
PrintUnmangledNameSafely(GVar, O);
|
|
O << "'\n";
|
|
|
|
// If the initializer is a extern weak symbol, remember to emit the weak
|
|
// reference!
|
|
if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
|
|
if (GV->hasExternalWeakLinkage())
|
|
ExtWeakSymbols.insert(GV);
|
|
|
|
EmitGlobalConstant(C);
|
|
O << '\n';
|
|
}
|
|
|
|
bool LinuxAsmPrinter::doFinalization(Module &M) {
|
|
// Print out module-level global variables here.
|
|
for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
|
|
I != E; ++I)
|
|
printModuleLevelGV(I);
|
|
|
|
// Emit initial debug information.
|
|
DW->EndModule();
|
|
|
|
return AsmPrinter::doFinalization(M);
|
|
}
|
|
|
|
/// createSPUCodePrinterPass - Returns a pass that prints the Cell SPU
|
|
/// assembly code for a MachineFunction to the given output stream, in a format
|
|
/// that the Linux SPU assembler can deal with.
|
|
///
|
|
FunctionPass *llvm::createSPUAsmPrinterPass(raw_ostream &o,
|
|
SPUTargetMachine &tm,
|
|
unsigned OptLevel, bool verbose) {
|
|
return new LinuxAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
|
|
}
|