Jim Grosbach b58f498f75 Add register-reuse to frame-index register scavenging. When a target uses ... a virtual register to eliminate a frame index, it can return that register and the constant stored there to PEI to track. When scavenging to allocate for those registers, PEI then tracks the last-used register and value, and if it is still available and matches the value for the next index, reuses the existing value rather and removes the re-materialization instructions. Fancier tracking and adjustment of scavenger allocations to keep more values live for longer is possible, but not yet implemented and would likely be better done via a different, less special-purpose, approach to the problem. eliminateFrameIndex() is modified so the target implementations can return the registers they wish to be tracked for reuse. ARM Thumb1 implements and utilizes the new mechanism. All other targets are simply modified to adjust for the changed eliminateFrameIndex() prototype. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@83467 91177308-0d34-0410-b5e6-96231b3b80d8		2009-10-07 17:12:56 +00:00
..
AsmPrinter	Instead of printing unnecessary basic block labels as labels in	2009-10-06 17:38:38 +00:00
TargetInfo	Factor commonality in triple match routines into helper template for registering	2009-07-26 05:03:33 +00:00
CMakeLists.txt	Normalize makefile comments and sort cmake file lists.	2009-08-31 13:05:24 +00:00
Makefile	Add TargetInfo libraries for all targets.	2009-07-15 06:35:19 +00:00
Mips.h	Add new helpers for registering targets.	2009-07-25 06:49:55 +00:00
Mips.td
MipsCallingConv.td
MipsDelaySlotFiller.cpp
MipsInstrFormats.td
MipsInstrFPU.td
MipsInstrInfo.cpp	Remove unused member functions.	2009-07-24 07:43:59 +00:00
MipsInstrInfo.h	Remove explicit enum integer values. They don't appear to be needed, and	2009-10-05 15:52:08 +00:00
MipsInstrInfo.td	Split EVT into MVT and EVT, the former representing _just_ a primitive type, while	2009-08-11 20:47:22 +00:00
MipsISelDAGToDAG.cpp	Rename getTargetNode to getMachineNode, for consistency with the	2009-09-25 18:54:59 +00:00
MipsISelLowering.cpp	Fix PR4926. When target hook EmitInstrWithCustomInserter() insert new basic blocks and update CFG, it should also inform sdisel of the changes so the phi source operands will come from the right basic blocks.	2009-09-19 09:51:03 +00:00
MipsISelLowering.h	Enhance EmitInstrWithCustomInserter() so target can specify CFG changes that sdisel will use to properly complete phi nodes.	2009-09-18 21:02:19 +00:00
MipsMachineFunction.h	Major calling convention code refactoring.	2009-08-05 01:29:28 +00:00
MipsMCAsmInfo.cpp	Update CMake build, unbreak linux build.	2009-08-22 22:07:08 +00:00
MipsMCAsmInfo.h	Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.	2009-08-22 20:48:53 +00:00
MipsRegisterInfo.cpp	Add register-reuse to frame-index register scavenging. When a target uses	2009-10-07 17:12:56 +00:00
MipsRegisterInfo.h	Add register-reuse to frame-index register scavenging. When a target uses	2009-10-07 17:12:56 +00:00
MipsRegisterInfo.td
MipsSchedule.td
MipsSubtarget.cpp	reintroduce support for Mips "small" section handling. This is	2009-08-13 06:28:06 +00:00
MipsSubtarget.h	reintroduce support for Mips "small" section handling. This is	2009-08-13 06:28:06 +00:00
MipsTargetMachine.cpp	Rename TargetAsmInfo (and its subclasses) to MCAsmInfo.	2009-08-22 20:48:53 +00:00
MipsTargetMachine.h	Change TargetAsmInfo to be constructed via TargetRegistry from a Target+Triple	2009-08-12 07:22:17 +00:00
MipsTargetObjectFile.cpp	reintroduce support for Mips "small" section handling. This is	2009-08-13 06:28:06 +00:00
MipsTargetObjectFile.h	reintroduce support for Mips "small" section handling. This is	2009-08-13 06:28:06 +00:00