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https://github.com/c64scene-ar/llvm-6502.git
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86f9adb8be
This allows the (many) pseudo-instructions we have that map onto a single real instruction to have their expansion during MC lowering handled automatically instead of the current cumbersome manual expansion required. These sorts of pseudos are common when an instruction is used in situations that require different MachineInstr flags (isTerminator, isBranch, et. al.) than the generic instruction description has. For example, using a move to the PC to implement a branch. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@134704 91177308-0d34-0410-b5e6-96231b3b80d8
66 lines
2.0 KiB
C++
66 lines
2.0 KiB
C++
//===- PseudoLoweringEmitter.h - PseudoLowering Generator -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#ifndef PSEUDOLOWERINGEMITTER_H
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#define PSEUDOLOWERINGEMITTER_H
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#include "CodeGenInstruction.h"
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#include "CodeGenTarget.h"
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#include "TableGenBackend.h"
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#include "llvm/ADT/IndexedMap.h"
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#include "llvm/ADT/SmallVector.h"
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namespace llvm {
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class PseudoLoweringEmitter : public TableGenBackend {
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struct OpData {
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enum MapKind { Operand, Imm, Reg };
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MapKind Kind;
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union {
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unsigned Operand; // Operand number mapped to.
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uint64_t Imm; // Integer immedate value.
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Record *Reg; // Physical register.
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} Data;
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};
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struct PseudoExpansion {
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CodeGenInstruction Source; // The source pseudo instruction definition.
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CodeGenInstruction Dest; // The destination instruction to lower to.
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IndexedMap<OpData> OperandMap;
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PseudoExpansion(CodeGenInstruction &s, CodeGenInstruction &d,
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IndexedMap<OpData> &m) :
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Source(s), Dest(d), OperandMap(m) {}
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};
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RecordKeeper &Records;
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// It's overkill to have an instance of the full CodeGenTarget object,
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// but it loads everything on demand, not in the constructor, so it's
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// lightweight in performance, so it works out OK.
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CodeGenTarget Target;
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SmallVector<PseudoExpansion, 64> Expansions;
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unsigned addDagOperandMapping(Record *Rec, DagInit *Dag,
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CodeGenInstruction &Insn,
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IndexedMap<OpData> &OperandMap,
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unsigned BaseIdx);
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void evaluateExpansion(Record *Pseudo);
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void emitLoweringEmitter(raw_ostream &o);
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public:
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PseudoLoweringEmitter(RecordKeeper &R) : Records(R), Target(R) {}
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/// run - Output the pseudo-lowerings.
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void run(raw_ostream &o);
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};
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} // end llvm namespace
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#endif
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