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https://github.com/c64scene-ar/llvm-6502.git
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3ee306cbc0
Hello world will compile and execute with this patch. Patch by Reed Kotler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@160651 91177308-0d34-0410-b5e6-96231b3b80d8
47 lines
1.5 KiB
C++
47 lines
1.5 KiB
C++
//===-- MipsMachineFunctionInfo.cpp - Private data used for Mips ----------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MipsMachineFunction.h"
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#include "MipsInstrInfo.h"
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#include "MipsSubtarget.h"
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#include "MCTargetDesc/MipsBaseInfo.h"
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#include "llvm/Function.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/Support/CommandLine.h"
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using namespace llvm;
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static cl::opt<bool>
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FixGlobalBaseReg("mips-fix-global-base-reg", cl::Hidden, cl::init(true),
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cl::desc("Always use $gp as the global base register."));
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bool MipsFunctionInfo::globalBaseRegSet() const {
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return GlobalBaseReg;
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}
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unsigned MipsFunctionInfo::getGlobalBaseReg() {
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// Return if it has already been initialized.
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if (GlobalBaseReg)
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return GlobalBaseReg;
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const MipsSubtarget &ST = MF.getTarget().getSubtarget<MipsSubtarget>();
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const TargetRegisterClass *RC;
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if (ST.inMips16Mode())
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RC=(const TargetRegisterClass*)&Mips::CPU16RegsRegClass;
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else
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RC = ST.isABI_N64() ?
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(const TargetRegisterClass*)&Mips::CPU64RegsRegClass :
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(const TargetRegisterClass*)&Mips::CPURegsRegClass;
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return GlobalBaseReg = MF.getRegInfo().createVirtualRegister(RC);
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}
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void MipsFunctionInfo::anchor() { }
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