Matt Arsenault b6520ab625 R600/SI: Add class intrinsic ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225305 91177308-0d34-0410-b5e6-96231b3b80d8		2015-01-06 23:00:37 +00:00
..
AArch64	[AArch64] Improve codegen of store lane instructions by avoiding GPR usage.	2015-01-05 17:10:26 +00:00
ARM	Emit the build attribute Tag_conformance.	2015-01-05 13:12:17 +00:00
CPP
Generic	CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.	2014-12-19 20:50:07 +00:00
Hexagon	[Hexagon] Adding dealloc_return encoding and absolute address stores.	2015-01-06 16:15:15 +00:00
Inputs	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Mips	[mips][microMIPS] Fix bugs related to atomic SC/LL instructions	2014-12-18 16:39:29 +00:00
MSP430
NVPTX	[NVPTX] Fix bugs related to isSingleValueType	2014-12-17 17:59:04 +00:00
PowerPC	[PowerPC] Reuse a load operand in int->fp conversions	2015-01-06 22:31:02 +00:00
R600	R600/SI: Add class intrinsic	2015-01-06 23:00:37 +00:00
SPARC	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
SystemZ	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Thumb	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
Thumb2	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00
X86	Change the .ll syntax for comdats and add a syntactic sugar.	2015-01-06 22:55:16 +00:00
XCore	IR: Make metadata typeless in assembly	2014-12-15 19:07:53 +00:00