mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
90 lines
1.9 KiB
LLVM
90 lines
1.9 KiB
LLVM
; RUN: llc -mcpu=pwr7 < %s | FileCheck %s
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target datalayout = "E-m:e-i64:64-n32:64"
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target triple = "powerpc64-unknown-linux-gnu"
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; Function Attrs: nounwind readnone
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define signext i32 @foo(i32 signext %a) #0 {
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entry:
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%mul = mul nsw i32 %a, %a
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%shr2 = lshr i32 %mul, 5
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ret i32 %shr2
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; CHECK-LABEL @foo
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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define zeroext i32 @test6(i32 zeroext %x) #0 {
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entry:
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%and = lshr i32 %x, 16
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%shr = and i32 %and, 255
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%and1 = shl i32 %x, 16
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%shl = and i32 %and1, 16711680
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%or = or i32 %shr, %shl
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ret i32 %or
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; CHECK-LABEL @test6
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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define zeroext i32 @min(i32 zeroext %a, i32 zeroext %b) #0 {
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entry:
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%cmp = icmp ule i32 %a, %b
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%cond = select i1 %cmp, i32 %a, i32 %b
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ret i32 %cond
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; CHECK-LABEL @min
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.bswap.i32(i32) #0
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; Function Attrs: nounwind readonly
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define zeroext i32 @bs32(i32* nocapture readonly %x) #1 {
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entry:
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%0 = load i32, i32* %x, align 4
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%1 = tail call i32 @llvm.bswap.i32(i32 %0)
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ret i32 %1
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; CHECK-LABEL: @bs32
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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; Function Attrs: nounwind readonly
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define zeroext i16 @bs16(i16* nocapture readonly %x) #1 {
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entry:
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%0 = load i16, i16* %x, align 2
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%1 = tail call i16 @llvm.bswap.i16(i16 %0)
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ret i16 %1
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; CHECK-LABEL: @bs16
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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; Function Attrs: nounwind readnone
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declare i16 @llvm.bswap.i16(i16) #0
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; Function Attrs: nounwind readnone
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define zeroext i32 @ctlz32(i32 zeroext %x) #0 {
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entry:
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%0 = tail call i32 @llvm.ctlz.i32(i32 %x, i1 false)
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ret i32 %0
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; CHECK-LABEL: @ctlz32
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; CHECK-NOT: rldicl 3, {{[0-9]+}}, 0, 32
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; CHECK: blr
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}
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; Function Attrs: nounwind readnone
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declare i32 @llvm.ctlz.i32(i32, i1) #0
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attributes #0 = { nounwind readnone }
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attributes #1 = { nounwind readonly }
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