mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-21 00:32:23 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
324 lines
9.5 KiB
LLVM
324 lines
9.5 KiB
LLVM
; RUN: llc < %s -march=arm -no-integrated-as
|
|
; ModuleID = 'mult-alt-generic.c'
|
|
target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32"
|
|
target triple = "arm"
|
|
|
|
@mout0 = common global i32 0, align 4
|
|
@min1 = common global i32 0, align 4
|
|
@marray = common global [2 x i32] zeroinitializer, align 4
|
|
|
|
define arm_aapcscc void @single_m() nounwind {
|
|
entry:
|
|
call void asm "foo $1,$0", "=*m,*m"(i32* @mout0, i32* @min1) nounwind
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_o() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%index = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %index, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_V() nounwind {
|
|
entry:
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_lt() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r,<r"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
%tmp1 = load i32, i32* %in1, align 4
|
|
%1 = call i32 asm "foo $1,$0", "=r,r<"(i32 %tmp1) nounwind
|
|
store i32 %1, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_gt() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r,>r"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
%tmp1 = load i32, i32* %in1, align 4
|
|
%1 = call i32 asm "foo $1,$0", "=r,r>"(i32 %tmp1) nounwind
|
|
store i32 %1, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_r() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r,r"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_i() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r,i"(i32 1) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_n() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r,n"(i32 1) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_E() nounwind {
|
|
entry:
|
|
%out0 = alloca double, align 8
|
|
store double 0.000000e+000, double* %out0, align 8
|
|
; No lowering support.
|
|
; %0 = call double asm "foo $1,$0", "=r,E"(double 1.000000e+001) nounwind
|
|
; store double %0, double* %out0, align 8
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_F() nounwind {
|
|
entry:
|
|
%out0 = alloca double, align 8
|
|
store double 0.000000e+000, double* %out0, align 8
|
|
; No lowering support.
|
|
; %0 = call double asm "foo $1,$0", "=r,F"(double 1.000000e+000) nounwind
|
|
; store double %0, double* %out0, align 8
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_s() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_g() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
%tmp1 = load i32, i32* @min1, align 4
|
|
%1 = call i32 asm "foo $1,$0", "=r,imr"(i32 %tmp1) nounwind
|
|
store i32 %1, i32* %out0, align 4
|
|
%2 = call i32 asm "foo $1,$0", "=r,imr"(i32 1) nounwind
|
|
store i32 %2, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_X() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
%tmp1 = load i32, i32* @min1, align 4
|
|
%1 = call i32 asm "foo $1,$0", "=r,X"(i32 %tmp1) nounwind
|
|
store i32 %1, i32* %out0, align 4
|
|
%2 = call i32 asm "foo $1,$0", "=r,X"(i32 1) nounwind
|
|
store i32 %2, i32* %out0, align 4
|
|
%3 = call i32 asm "foo $1,$0", "=r,X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind
|
|
store i32 %3, i32* %out0, align 4
|
|
; No lowering support.
|
|
; %4 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+001) nounwind
|
|
; store i32 %4, i32* %out0, align 4
|
|
; %5 = call i32 asm "foo $1,$0", "=r,X"(double 1.000000e+000) nounwind
|
|
; store i32 %5, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @single_p() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r,r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_m() nounwind {
|
|
entry:
|
|
%tmp = load i32, i32* @min1, align 4
|
|
call void asm "foo $1,$0", "=*m|r,m|r"(i32* @mout0, i32 %tmp) nounwind
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_o() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%index = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %index, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_V() nounwind {
|
|
entry:
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_lt() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r|r,r|<r"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
%tmp1 = load i32, i32* %in1, align 4
|
|
%1 = call i32 asm "foo $1,$0", "=r|r,r|r<"(i32 %tmp1) nounwind
|
|
store i32 %1, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_gt() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r|r,r|>r"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
%tmp1 = load i32, i32* %in1, align 4
|
|
%1 = call i32 asm "foo $1,$0", "=r|r,r|r>"(i32 %tmp1) nounwind
|
|
store i32 %1, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_r() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r|r,r|m"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_i() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r|r,r|i"(i32 1) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_n() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r|r,r|n"(i32 1) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_E() nounwind {
|
|
entry:
|
|
%out0 = alloca double, align 8
|
|
store double 0.000000e+000, double* %out0, align 8
|
|
; No lowering support.
|
|
; %0 = call double asm "foo $1,$0", "=r|r,r|E"(double 1.000000e+001) nounwind
|
|
; store double %0, double* %out0, align 8
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_F() nounwind {
|
|
entry:
|
|
%out0 = alloca double, align 8
|
|
store double 0.000000e+000, double* %out0, align 8
|
|
; No lowering support.
|
|
; %0 = call double asm "foo $1,$0", "=r|r,r|F"(double 1.000000e+000) nounwind
|
|
; store double %0, double* %out0, align 8
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_s() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_g() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
%tmp1 = load i32, i32* @min1, align 4
|
|
%1 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 %tmp1) nounwind
|
|
store i32 %1, i32* %out0, align 4
|
|
%2 = call i32 asm "foo $1,$0", "=r|r,r|imr"(i32 1) nounwind
|
|
store i32 %2, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_X() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
%in1 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
store i32 1, i32* %in1, align 4
|
|
%tmp = load i32, i32* %in1, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
%tmp1 = load i32, i32* @min1, align 4
|
|
%1 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 %tmp1) nounwind
|
|
store i32 %1, i32* %out0, align 4
|
|
%2 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32 1) nounwind
|
|
store i32 %2, i32* %out0, align 4
|
|
%3 = call i32 asm "foo $1,$0", "=r|r,r|X"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind
|
|
store i32 %3, i32* %out0, align 4
|
|
; No lowering support.
|
|
; %4 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+001) nounwind
|
|
; store i32 %4, i32* %out0, align 4
|
|
; %5 = call i32 asm "foo $1,$0", "=r|r,r|X"(double 1.000000e+000) nounwind
|
|
; store i32 %5, i32* %out0, align 4
|
|
ret void
|
|
}
|
|
|
|
define arm_aapcscc void @multi_p() nounwind {
|
|
entry:
|
|
%out0 = alloca i32, align 4
|
|
store i32 0, i32* %out0, align 4
|
|
%0 = call i32 asm "foo $1,$0", "=r|r,r|r"(i32* getelementptr inbounds ([2 x i32]* @marray, i32 0, i32 0)) nounwind
|
|
store i32 %0, i32* %out0, align 4
|
|
ret void
|
|
}
|