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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786. A similar migration script can be used to update test cases, though a few more test case improvements/changes were required this time around: (r229269-r229278) import fileinput import sys import re pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)") for line in sys.stdin: sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line)) Reviewers: rafael, dexonsmith, grosser Differential Revision: http://reviews.llvm.org/D7649 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
2.3 KiB
LLVM
59 lines
2.3 KiB
LLVM
; RUN: llc < %s -mtriple=x86_64-linux-gnu -mcpu=atom | FileCheck %s
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; <rdar://problem/8006248>
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; This randomly started passing after an unrelated change, if it fails again it
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; might be worth looking at PR12324: misched bringup.
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@llvm.used = appending global [1 x i8*] [i8* bitcast (void ([40 x i16]*, i32*, i16**, i64*)* @func to i8*)], section "llvm.metadata"
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define void @func([40 x i16]* %a, i32* %b, i16** %c, i64* %d) nounwind {
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entry:
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%tmp103 = getelementptr inbounds [40 x i16], [40 x i16]* %a, i64 0, i64 4
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%tmp104 = load i16, i16* %tmp103, align 2
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%tmp105 = sext i16 %tmp104 to i32
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%tmp106 = load i32, i32* %b, align 4
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%tmp107 = sub nsw i32 4, %tmp106
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%tmp108 = load i16*, i16** %c, align 8
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%tmp109 = sext i32 %tmp107 to i64
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%tmp110 = getelementptr inbounds i16, i16* %tmp108, i64 %tmp109
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%tmp111 = load i16, i16* %tmp110, align 1
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%tmp112 = sext i16 %tmp111 to i32
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%tmp = mul i32 355244649, %tmp112
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%tmp1 = mul i32 %tmp, %tmp105
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%tmp2 = add i32 %tmp1, 2138875574
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%tmp3 = add i32 %tmp2, 1546991088
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%tmp4 = mul i32 %tmp3, 2122487257
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%tmp5 = icmp sge i32 %tmp4, 2138875574
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%tmp6 = icmp slt i32 %tmp4, -8608074
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%tmp7 = or i1 %tmp5, %tmp6
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%outSign = select i1 %tmp7, i32 1, i32 -1
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%tmp8 = icmp slt i32 %tmp4, 0
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%tmp9 = icmp eq i32 %outSign, 1
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%tmp10 = and i1 %tmp8, %tmp9
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%tmp11 = sext i32 %tmp4 to i64
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%tmp12 = add i64 %tmp11, 5089792279245435153
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; CHECK: addl $2138875574, %e[[REGISTER_zext:[a-z0-9]+]]
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; CHECK: movslq %e[[REGISTER_zext]], [[REGISTER_sext:%r[a-z0-9]+]]
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; CHECK: cmpl $-8608074, %e[[REGISTER_zext]]
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; CHECK-NOT: [[REGISTER_zext]]
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; CHECK-DAG: testl %e[[REGISTER_zext]]
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; CHECK: subq %r[[REGISTER_zext]], [[REGISTER_sext]]
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%tmp13 = sub i64 %tmp12, 2138875574
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%tmp14 = zext i32 %tmp4 to i64
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%tmp15 = sub i64 %tmp11, %tmp14
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%tmp16 = select i1 %tmp10, i64 %tmp15, i64 0
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%tmp17 = sub i64 %tmp13, %tmp16
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%tmp18 = mul i64 %tmp17, 4540133155013554595
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%tmp19 = sub i64 %tmp18, 5386586244038704851
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%tmp20 = add i64 %tmp19, -1368057358110947217
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%tmp21 = mul i64 %tmp20, -422037402840850817
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%tmp115 = load i64, i64* %d, align 8
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%alphaX = mul i64 468858157810230901, %tmp21
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%alphaXbetaY = add i64 %alphaX, %tmp115
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%transformed = add i64 %alphaXbetaY, 9040145182981852475
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store i64 %transformed, i64* %d, align 8
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ret void
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}
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