mirror of
https://github.com/c64scene-ar/llvm-6502.git
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0b8c9a80f2
into their new header subdirectory: include/llvm/IR. This matches the directory structure of lib, and begins to correct a long standing point of file layout clutter in LLVM. There are still more header files to move here, but I wanted to handle them in separate commits to make tracking what files make sense at each layer easier. The only really questionable files here are the target intrinsic tablegen files. But that's a battle I'd rather not fight today. I've updated both CMake and Makefile build systems (I think, and my tests think, but I may have missed something). I've also re-sorted the includes throughout the project. I'll be committing updates to Clang, DragonEgg, and Polly momentarily. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@171366 91177308-0d34-0410-b5e6-96231b3b80d8
197 lines
7.6 KiB
C++
197 lines
7.6 KiB
C++
//===-- AsmPrinterDwarf.cpp - AsmPrinter Dwarf Support --------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the Dwarf emissions parts of AsmPrinter.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "asm-printer"
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#include "llvm/CodeGen/AsmPrinter.h"
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#include "llvm/ADT/Twine.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/MC/MCAsmInfo.h"
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#include "llvm/MC/MCSection.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSymbol.h"
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#include "llvm/MC/MachineLocation.h"
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#include "llvm/Support/Dwarf.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Target/TargetFrameLowering.h"
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#include "llvm/Target/TargetLoweringObjectFile.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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using namespace llvm;
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//===----------------------------------------------------------------------===//
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// Dwarf Emission Helper Routines
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//===----------------------------------------------------------------------===//
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/// EmitSLEB128 - emit the specified signed leb128 value.
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void AsmPrinter::EmitSLEB128(int Value, const char *Desc) const {
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if (isVerbose() && Desc)
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OutStreamer.AddComment(Desc);
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OutStreamer.EmitSLEB128IntValue(Value);
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}
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/// EmitULEB128 - emit the specified signed leb128 value.
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void AsmPrinter::EmitULEB128(unsigned Value, const char *Desc,
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unsigned PadTo) const {
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if (isVerbose() && Desc)
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OutStreamer.AddComment(Desc);
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OutStreamer.EmitULEB128IntValue(Value, 0/*addrspace*/, PadTo);
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}
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/// EmitCFAByte - Emit a .byte 42 directive for a DW_CFA_xxx value.
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void AsmPrinter::EmitCFAByte(unsigned Val) const {
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if (isVerbose()) {
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if (Val >= dwarf::DW_CFA_offset && Val < dwarf::DW_CFA_offset+64)
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OutStreamer.AddComment("DW_CFA_offset + Reg (" +
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Twine(Val-dwarf::DW_CFA_offset) + ")");
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else
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OutStreamer.AddComment(dwarf::CallFrameString(Val));
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}
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OutStreamer.EmitIntValue(Val, 1, 0/*addrspace*/);
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}
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static const char *DecodeDWARFEncoding(unsigned Encoding) {
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switch (Encoding) {
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case dwarf::DW_EH_PE_absptr: return "absptr";
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case dwarf::DW_EH_PE_omit: return "omit";
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case dwarf::DW_EH_PE_pcrel: return "pcrel";
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case dwarf::DW_EH_PE_udata4: return "udata4";
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case dwarf::DW_EH_PE_udata8: return "udata8";
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case dwarf::DW_EH_PE_sdata4: return "sdata4";
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case dwarf::DW_EH_PE_sdata8: return "sdata8";
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case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata4: return "pcrel udata4";
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case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata4: return "pcrel sdata4";
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case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_udata8: return "pcrel udata8";
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case dwarf::DW_EH_PE_pcrel | dwarf::DW_EH_PE_sdata8: return "pcrel sdata8";
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case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_udata4:
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return "indirect pcrel udata4";
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case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_sdata4:
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return "indirect pcrel sdata4";
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case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_udata8:
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return "indirect pcrel udata8";
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case dwarf::DW_EH_PE_indirect | dwarf::DW_EH_PE_pcrel |dwarf::DW_EH_PE_sdata8:
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return "indirect pcrel sdata8";
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}
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return "<unknown encoding>";
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}
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/// EmitEncodingByte - Emit a .byte 42 directive that corresponds to an
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/// encoding. If verbose assembly output is enabled, we output comments
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/// describing the encoding. Desc is an optional string saying what the
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/// encoding is specifying (e.g. "LSDA").
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void AsmPrinter::EmitEncodingByte(unsigned Val, const char *Desc) const {
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if (isVerbose()) {
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if (Desc != 0)
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OutStreamer.AddComment(Twine(Desc)+" Encoding = " +
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Twine(DecodeDWARFEncoding(Val)));
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else
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OutStreamer.AddComment(Twine("Encoding = ") +
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DecodeDWARFEncoding(Val));
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}
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OutStreamer.EmitIntValue(Val, 1, 0/*addrspace*/);
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}
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/// GetSizeOfEncodedValue - Return the size of the encoding in bytes.
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unsigned AsmPrinter::GetSizeOfEncodedValue(unsigned Encoding) const {
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if (Encoding == dwarf::DW_EH_PE_omit)
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return 0;
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switch (Encoding & 0x07) {
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default: llvm_unreachable("Invalid encoded value.");
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case dwarf::DW_EH_PE_absptr: return TM.getDataLayout()->getPointerSize();
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case dwarf::DW_EH_PE_udata2: return 2;
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case dwarf::DW_EH_PE_udata4: return 4;
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case dwarf::DW_EH_PE_udata8: return 8;
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}
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}
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void AsmPrinter::EmitTTypeReference(const GlobalValue *GV,
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unsigned Encoding) const {
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if (GV) {
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const TargetLoweringObjectFile &TLOF = getObjFileLowering();
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const MCExpr *Exp =
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TLOF.getTTypeGlobalReference(GV, Mang, MMI, Encoding, OutStreamer);
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OutStreamer.EmitValue(Exp, GetSizeOfEncodedValue(Encoding), /*addrspace*/0);
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} else
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OutStreamer.EmitIntValue(0, GetSizeOfEncodedValue(Encoding), 0);
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}
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/// EmitSectionOffset - Emit the 4-byte offset of Label from the start of its
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/// section. This can be done with a special directive if the target supports
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/// it (e.g. cygwin) or by emitting it as an offset from a label at the start
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/// of the section.
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///
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/// SectionLabel is a temporary label emitted at the start of the section that
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/// Label lives in.
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void AsmPrinter::EmitSectionOffset(const MCSymbol *Label,
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const MCSymbol *SectionLabel) const {
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// On COFF targets, we have to emit the special .secrel32 directive.
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if (MAI->getDwarfSectionOffsetDirective()) {
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OutStreamer.EmitCOFFSecRel32(Label);
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return;
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}
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// Get the section that we're referring to, based on SectionLabel.
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const MCSection &Section = SectionLabel->getSection();
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// If Label has already been emitted, verify that it is in the same section as
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// section label for sanity.
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assert((!Label->isInSection() || &Label->getSection() == &Section) &&
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"Section offset using wrong section base for label");
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// If the section in question will end up with an address of 0 anyway, we can
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// just emit an absolute reference to save a relocation.
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if (Section.isBaseAddressKnownZero()) {
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OutStreamer.EmitSymbolValue(Label, 4, 0/*AddrSpace*/);
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return;
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}
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// Otherwise, emit it as a label difference from the start of the section.
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EmitLabelDifference(Label, SectionLabel, 4);
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}
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//===----------------------------------------------------------------------===//
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// Dwarf Lowering Routines
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//===----------------------------------------------------------------------===//
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/// EmitCFIFrameMove - Emit a frame instruction.
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void AsmPrinter::EmitCFIFrameMove(const MachineMove &Move) const {
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const TargetRegisterInfo *RI = TM.getRegisterInfo();
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const MachineLocation &Dst = Move.getDestination();
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const MachineLocation &Src = Move.getSource();
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// If advancing cfa.
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if (Dst.isReg() && Dst.getReg() == MachineLocation::VirtualFP) {
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if (Src.getReg() == MachineLocation::VirtualFP) {
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OutStreamer.EmitCFIDefCfaOffset(-Src.getOffset());
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} else {
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// Reg + Offset
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OutStreamer.EmitCFIDefCfa(RI->getDwarfRegNum(Src.getReg(), true),
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Src.getOffset());
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}
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} else if (Src.isReg() && Src.getReg() == MachineLocation::VirtualFP) {
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assert(Dst.isReg() && "Machine move not supported yet.");
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OutStreamer.EmitCFIDefCfaRegister(RI->getDwarfRegNum(Dst.getReg(), true));
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} else {
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assert(!Dst.isReg() && "Machine move not supported yet.");
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OutStreamer.EmitCFIOffset(RI->getDwarfRegNum(Src.getReg(), true),
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Dst.getOffset());
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}
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}
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