llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2025-02-05 14:34:55 +00:00

History

Hal Finkel c9e5247ea7 [PowerPC] Ensure that the TOC reload directly follows bctrl on PPC64

On non-Darwin PPC64, the TOC reload needs to come directly after the bctrl
instruction (for indirect calls) because the 'bctrl/ld 2, 40(1)' instruction
sequence is interpreted by the unwinding code in libgcc. To make sure these
occur as a pair, as with other pairings interpreted by the linker, fuse the two
instructions into one instruction (for code generation only).

In the future, we might wish to do this by emitting CFI directives instead,
but this solution is simpler, and mirrors what GCC does. Additional discussion
on this point is contained in the PR.

Fixes PR22015.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224788 91177308-0d34-0410-b5e6-96231b3b80d8

2014-12-23 22:29:40 +00:00

AArch64

Lower multiply-negate operation to mneg on AArch64

2014-12-22 13:38:58 +00:00

ARM

[ARM] Don't break alignment when combining base updates into load/stores.

2014-12-23 06:07:31 +00:00

CPP

…

Generic

CodeGen: do not attempt to invalidate virtual registers for zero-sized phis.

2014-12-19 20:50:07 +00:00