Chandler Carruth e6450dc2af Add a much more conservative strategy for aligning branch targets. ... Previously, MBP essentially aligned every branch target it could. This bloats code quite a bit, especially non-looping code which has no real reason to prefer aligned branch targets so heavily. As Andy said in review, it's still a bit odd to do this without a real cost model, but this at least has much more plausible heuristics. Fixes PR13265. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@161409 91177308-0d34-0410-b5e6-96231b3b80d8		2012-08-07 09:45:24 +00:00
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ARM	Add stack spill / reload instructions for DTriple and DQuad register classes, which	2012-08-04 13:16:12 +00:00
CellSPU	Refactor and check "onlyReadsMemory" before optimizing builtins.	2012-08-03 23:29:17 +00:00
CPP	test commit	2012-07-18 17:53:05 +00:00
Generic	Fix a bug in the scalarization of BUILD_VECTOR. BUILD_VECTOR elements may be wider than the output element type. Make sure to trunc them if needed.	2012-07-15 20:39:08 +00:00
Hexagon	Refactor and check "onlyReadsMemory" before optimizing builtins.	2012-08-03 23:29:17 +00:00
MBlaze
Mips	1. Redo mips16 instructions to avoid multiple opcodes for same instruction.	2012-08-03 22:57:02 +00:00
MSP430
NVPTX
PowerPC	MFTB on PPC64 should really be encoded using MFSPR.	2012-08-06 21:21:44 +00:00
SPARC
Thumb
Thumb2	[arm-fast-isel] Add support for vararg function calls.	2012-07-19 09:49:00 +00:00
X86	Add a much more conservative strategy for aligning branch targets.	2012-08-07 09:45:24 +00:00
XCore