Tim Northover 22266c1d48 ARM: Use "dmb sy" for barriers on M-class CPUs ...

The usual default of "dmb ish" (inner-shareable) isn't even a valid instruction
on v6M or v7M (well, it does the same thing but software is strongly
discouraged from using it) so we should emit a full-system barrier there.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@189483 91177308-0d34-0410-b5e6-96231b3b80d8

2013-08-28 14:39:19 +00:00

..

AArch64

A minor change for an obvous problem caused by r188451:

2013-08-21 17:47:53 +00:00

ARM

ARM: remove unused v(add|sub)hn and vqdml[as]l intrinsics.

2013-08-28 14:33:33 +00:00

CPP

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00

Generic

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00

Hexagon

Debug Info: add an identifier field to DICompositeType.

2013-08-26 22:39:55 +00:00

Inputs

Debug Info: add an identifier field to DICompositeType.

2013-08-26 22:39:55 +00:00

Mips

[mips][msa] Added bnz.df, bnz.v, bz.df, and bz.v

2013-08-28 12:14:50 +00:00

MSP430

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00

NVPTX

[NVPTX] Re-enable assembly printing support for inline assembly

2013-08-24 01:17:23 +00:00

PowerPC

Debug Info: add an identifier field to DICompositeType.

2013-08-26 22:39:55 +00:00

R600

R600/SI: Enable local-memory-two-objects lit test

2013-08-27 10:28:26 +00:00

SPARC

[Sparc] Add long double (f128) instructions to sparc backend.

2013-08-25 18:30:06 +00:00

SystemZ

[SystemZ] Add support for TMHH, TMHL, TMLH and TMLL

2013-08-28 10:31:43 +00:00

Thumb

ARM: Use "dmb sy" for barriers on M-class CPUs

2013-08-28 14:39:19 +00:00

Thumb2

ARM: make sure ARM-mode pseudo-inst requires IsARM

2013-08-23 10:16:39 +00:00

X86

AVX-512: added SQRT, VRSQRT14, VCOMISS, VUCOMISS, VRCP14, VPABS

2013-08-28 11:21:58 +00:00

XCore

[tests] Cleanup initialization of test suffixes.

2013-08-16 00:37:11 +00:00