Nate Begeman b73628b5ab Add support for generating v4i32 altivec code ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25046 91177308-0d34-0410-b5e6-96231b3b80d8		2005-12-30 00:12:56 +00:00
..
Alpha	let us get some do what I meant not what I said stuff checked in. You would think the alpha backend would be 64bit clean	2005-12-29 01:06:12 +00:00
CBackend	yet more C++ standards-compliance stuff.	2005-12-27 10:40:34 +00:00
IA64	nasty paste-o, calls passing more than 8 arguments along were having	2005-12-27 10:17:03 +00:00
PowerPC	Add support for generating v4i32 altivec code	2005-12-30 00:12:56 +00:00
Skeleton	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
Sparc	Added field noResults to Instruction.	2005-12-26 09:11:45 +00:00
SparcV8	Added field noResults to Instruction.	2005-12-26 09:11:45 +00:00
SparcV9	Support multiple ValueTypes per RegisterClass, needed for upcoming vector	2005-12-01 04:51:06 +00:00
X86	Fix a problem duraid pointed out to me compiling kc++ with -enable-x86-fastcc	2005-12-27 03:02:18 +00:00
Makefile
MRegisterInfo.cpp
SubtargetFeature.cpp
Target.td	Added field noResults to Instruction.	2005-12-26 09:11:45 +00:00
TargetData.cpp
TargetFrameInfo.cpp
TargetInstrInfo.cpp
TargetMachine.cpp
TargetMachineRegistry.cpp
TargetSchedInfo.cpp
TargetSchedule.td
TargetSelectionDAG.td	support targetexternalsym	2005-12-24 23:36:59 +00:00
TargetSubtarget.cpp