llvm-6502

mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-12-16 11:30:51 +00:00

History

Dan Gohman 6520e20e4f Teach DAGCombine to fold constant offsets into GlobalAddress nodes, and add a TargetLowering hook for it to use to determine when this is legal (i.e. not in PIC mode, etc.) This allows instruction selection to emit folded constant offsets in more cases, such as the included testcase, eliminating the need for explicit arithmetic instructions. This eliminates the need for the C++ code in X86ISelDAGToDAG.cpp that attempted to achieve the same effect, but wasn't as effective. Also, fix handling of offsets in GlobalAddressSDNodes in several places, including changing GlobalAddressSDNode's offset from int to int64_t. The Mips, Alpha, Sparc, and CellSPU targets appear to be unaware of GlobalAddress offsets currently, so set the hook to false on those targets. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@57748 91177308-0d34-0410-b5e6-96231b3b80d8		2008-10-18 02:06:02 +00:00
..
Alpha.h
Alpha.td
AlphaAsmPrinter.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaBranchSelector.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaCodeEmitter.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp	Const-ify several TargetInstrInfo methods.	2008-10-16 01:49:15 +00:00
AlphaInstrInfo.h	Const-ify several TargetInstrInfo methods.	2008-10-16 01:49:15 +00:00
AlphaInstrInfo.td	Change CALLSEQ_BEGIN and CALLSEQ_END to take TargetConstant's as	2008-10-11 22:08:30 +00:00
AlphaISelDAGToDAG.cpp	Trim #includes.	2008-10-16 20:18:31 +00:00
AlphaISelLowering.cpp	Teach DAGCombine to fold constant offsets into GlobalAddress nodes,	2008-10-18 02:06:02 +00:00
AlphaISelLowering.h	Teach DAGCombine to fold constant offsets into GlobalAddress nodes,	2008-10-18 02:06:02 +00:00
AlphaJITInfo.cpp
AlphaJITInfo.h
AlphaLLRP.cpp	Tidy up several unbeseeming casts from pointer to intptr_t.	2008-09-04 17:05:41 +00:00
AlphaRegisterInfo.cpp	Switch the MachineOperand accessors back to the short names like	2008-10-03 15:45:36 +00:00
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp	mark some targets as experimental. Andrew, if you think that Alpha is	2008-10-16 06:16:50 +00:00
AlphaTargetMachine.h
CMakeLists.txt	CMake: Builds all targets.	2008-09-26 04:40:32 +00:00
Makefile
README.txt

README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html