llvm-6502/test/CodeGen/X86/vsplit-and.ll
Chris Lattner 6f948be128 now that generic vector types aren't selected onto MMX registers, these
tests don't need -disable-mmx.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@122188 91177308-0d34-0410-b5e6-96231b3b80d8
2010-12-19 20:12:58 +00:00

23 lines
701 B
LLVM

; RUN: llc < %s -march=x86 | FileCheck %s
define void @t(<2 x i64>* %dst, <2 x i64> %src1, <2 x i64> %src2) nounwind readonly {
; CHECK: andb
%cmp1 = icmp ne <2 x i64> %src1, zeroinitializer
%cmp2 = icmp ne <2 x i64> %src2, zeroinitializer
%t1 = and <2 x i1> %cmp1, %cmp2
%t2 = sext <2 x i1> %t1 to <2 x i64>
store <2 x i64> %t2, <2 x i64>* %dst
ret void
}
define void @t2(<3 x i64>* %dst, <3 x i64> %src1, <3 x i64> %src2) nounwind readonly {
; CHECK: andb
%cmp1 = icmp ne <3 x i64> %src1, zeroinitializer
%cmp2 = icmp ne <3 x i64> %src2, zeroinitializer
%t1 = and <3 x i1> %cmp1, %cmp2
%t2 = sext <3 x i1> %t1 to <3 x i64>
store <3 x i64> %t2, <3 x i64>* %dst
ret void
}