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d281de2181
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@7352 91177308-0d34-0410-b5e6-96231b3b80d8
65 lines
2.2 KiB
C++
65 lines
2.2 KiB
C++
//===-- X86.h - Top-level interface for X86 representation ------*- C++ -*-===//
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//
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// This file contains the entry points for global functions defined in the x86
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// target library, as used by the LLVM JIT.
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//
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//===----------------------------------------------------------------------===//
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#ifndef TARGET_X86_H
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#define TARGET_X86_H
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#include <iosfwd>
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class TargetMachine;
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class Pass;
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/// createX86SimpleInstructionSelector - This pass converts an LLVM function
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/// into a machine code representation is a very simple peep-hole fashion. The
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/// generated code sucks but the implementation is nice and simple.
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///
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Pass *createX86SimpleInstructionSelector(TargetMachine &TM);
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/// createX86PeepholeOptimizer - Create a pass to perform X86 specific peephole
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/// optimizations.
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///
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Pass *createX86PeepholeOptimizerPass();
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/// createX86FloatingPointStackifierPass - This function returns a pass which
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/// converts floating point register references and pseudo instructions into
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/// floating point stack references and physical instructions.
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///
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Pass *createX86FloatingPointStackifierPass();
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/// createX86CodePrinterPass - Returns a pass that prints the X86
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/// assembly code for a MachineFunction to the given output stream,
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/// using the given target machine description. This should work
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/// regardless of whether the function is in SSA form.
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///
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Pass *createX86CodePrinterPass(std::ostream &o, TargetMachine &tm);
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/// X86EmitCodeToMemory - This function converts a register allocated function
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/// into raw machine code in a dynamically allocated chunk of memory. A pointer
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/// to the start of the function is returned.
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///
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Pass *createEmitX86CodeToMemory();
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/// X86 namespace - This namespace contains all of the register and opcode enums
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/// used by the X86 backend.
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///
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namespace X86 {
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// Defines a large number of symbolic names for X86 registers. This defines a
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// mapping from register name to register number.
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//
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enum Register {
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#define R(ENUM, NAME, FLAGS, TSFLAGS, ALIAS_SET) ENUM,
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#include "X86RegisterInfo.def"
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};
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// This defines a large number of symbolic names for X86 instruction opcodes.
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enum Opcode {
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#define I(ENUM, NAME, BASEOPCODE, FLAGS, TSFLAGS, IMPDEFS, IMPUSES) ENUM,
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#include "X86InstrInfo.def"
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};
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}
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#endif
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