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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@70694 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.7 KiB
C++
57 lines
1.7 KiB
C++
//===-- MSP430ISelLowering.cpp - MSP430 DAG Lowering Implementation ------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the MSP430TargetLowering class.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "msp430-lower"
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#include "MSP430ISelLowering.h"
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#include "MSP430.h"
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#include "MSP430TargetMachine.h"
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#include "MSP430Subtarget.h"
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#include "llvm/DerivedTypes.h"
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#include "llvm/Function.h"
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#include "llvm/Intrinsics.h"
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#include "llvm/CallingConv.h"
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#include "llvm/GlobalVariable.h"
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#include "llvm/GlobalAlias.h"
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#include "llvm/CodeGen/CallingConvLower.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/SelectionDAGISel.h"
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#include "llvm/CodeGen/ValueTypes.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/ADT/VectorExtras.h"
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using namespace llvm;
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MSP430TargetLowering::MSP430TargetLowering(MSP430TargetMachine &tm) :
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TargetLowering(tm), Subtarget(*tm.getSubtargetImpl()), TM(tm) {
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// Set up the register classes.
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addRegisterClass(MVT::i16, MSP430::MSP430RegsRegisterClass);
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// Compute derived properties from the register classes
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computeRegisterProperties();
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}
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SDValue MSP430TargetLowering::
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LowerOperation(SDValue Op, SelectionDAG &DAG) {
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switch (Op.getOpcode()) {
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default:
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assert(0 && "unimplemented operand");
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return SDValue();
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}
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}
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#include "MSP430GenCallingConv.inc"
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