llvm-6502/test
Chandler Carruth 6717f9d907 [x86] Teach the new vector shuffle lowering to lower v8i32 shuffles with
the native AVX2 instructions.

Note that the test case is really frustrating here because VPERMD
requires the mask to be in the register input and we don't produce
a comment looking through that to the constant pool. I'm going to
attempt to improve this in a subsequent commit, but not sure if I will
succeed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218347 91177308-0d34-0410-b5e6-96231b3b80d8
2014-09-24 01:24:44 +00:00
..
Analysis
Assembler
Bindings
Bitcode Ensure bitcode encoding stays stable. 2014-09-23 08:48:01 +00:00
BugPoint
CodeGen [x86] Teach the new vector shuffle lowering to lower v8i32 shuffles with 2014-09-24 01:24:44 +00:00
DebugInfo Fix segfault in AArch64 backend with -g and -mbig-endian 2014-09-23 15:38:11 +00:00
ExecutionEngine
Feature
FileCheck
Instrumentation
Integer
JitListener
Linker
LTO Try to fix i686-cygming bots. 2014-09-18 22:56:00 +00:00
MC AArch64: allow constant expressions for shifted reg literals 2014-09-23 22:16:02 +00:00
Object
Other
TableGen
tools Rebuild the inputs for the codeview-linetables.test with VS2013 2014-09-23 13:49:51 +00:00
Transforms GlobalOpt: Preserve comdats of unoptimized initializers 2014-09-23 22:33:01 +00:00
Unit
Verifier
YAMLParser
.clang-format
CMakeLists.txt
lit.cfg Exclude known and bugzilled failures from UBSan bootstrap 2014-09-17 20:17:52 +00:00
lit.site.cfg.in
Makefile
Makefile.tests
TestRunner.sh