Saleem Abdulrasool 0fe443d893 ARM: implement support for the UDF mnemonic ... The UDF instruction is a reserved undefined instruction space. The assembler mnemonic was introduced with ARM ARM rev C.a. The instruction is not predicated and the immediate constant is ignored by the CPU. Add support for the three encodings for this instruction. The changes to the invalid instruction test is due to the fact that the invalid instructions actually overlap with the undefined instruction. Introduction of the new instruction results in a partial decode as an undefined sequence. Drop the tests as they are invalid instruction patterns anyways. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208751 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-14 03:47:39 +00:00
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AArch64	TableGen: use PrintMethods to print more aliases	2014-05-12 18:04:06 +00:00
ARM	ARM: implement support for the UDF mnemonic	2014-05-14 03:47:39 +00:00
ARM64	[ARM64] Fix the misleading diagnostic on bad extend amount of reg+reg addressing mode.	2014-05-13 07:35:12 +00:00
AsmParser
COFF
Disassembler	ARM: implement support for the UDF mnemonic	2014-05-14 03:47:39 +00:00
ELF
MachO
Markup
Mips	[mips] Marked up instructions added in MIPS32r2 and tested that IAS for -mcpu=mips(2|32) does not accept them	2014-05-13 11:45:36 +00:00
PowerPC
Sparc
SystemZ
X86	TableGen: use PrintMethods to print more aliases	2014-05-12 18:04:06 +00:00