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https://github.com/c64scene-ar/llvm-6502.git
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ae3a0be92e
integer and floating-point opcodes, introducing FAdd, FSub, and FMul. For now, the AsmParser, BitcodeReader, and IRBuilder all preserve backwards compatability, and the Core LLVM APIs preserve backwards compatibility for IR producers. Most front-ends won't need to change immediately. This implements the first step of the plan outlined here: http://nondot.org/sabre/LLVMNotes/IntegerOverflow.txt git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72897 91177308-0d34-0410-b5e6-96231b3b80d8
35 lines
946 B
LLVM
35 lines
946 B
LLVM
; RUN: llvm-as < %s | llc -march=mips -f -o %t
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; RUN: grep {c\\..*\\.s} %t | count 3
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; RUN: grep {bc1\[tf\]} %t | count 3
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:32-i16:16:32-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "mipsallegrexel-psp-elf"
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define float @A(float %a, float %b) nounwind {
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entry:
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fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
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br i1 %0, label %bb, label %bb2
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bb: ; preds = %entry
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fadd float %a, 1.000000e+00 ; <float>:1 [#uses=1]
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ret float %1
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bb2: ; preds = %entry
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ret float %b
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}
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define float @B(float %a, float %b) nounwind {
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entry:
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fcmp ogt float %a, 1.000000e+00 ; <i1>:0 [#uses=1]
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%.0 = select i1 %0, float %a, float %b ; <float> [#uses=1]
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ret float %.0
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}
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define i32 @C(i32 %a, i32 %b, float %j) nounwind {
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entry:
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fcmp ogt float %j, 1.000000e+00 ; <i1>:0 [#uses=1]
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%.0 = select i1 %0, i32 %a, i32 %b ; <i32> [#uses=1]
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ret i32 %.0
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}
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