llvm-6502/test/CodeGen/SystemZ/cond-store-08.ll
Richard Sandiford 6824f127f9 [SystemZ] Be more careful about inverting CC masks
System z branches have a mask to select which of the 4 CC values should
cause the branch to be taken.  We can invert a branch by inverting the mask.
However, not all instructions can produce all 4 CC values, so inverting
the branch like this can lead to some oddities.  For example, integer
comparisons only produce a CC of 0 (equal), 1 (less) or 2 (greater).
If an integer EQ is reversed to NE before instruction selection,
the branch will test for 1 or 2.  If instead the branch is reversed
after instruction selection (by inverting the mask), it will test for
1, 2 or 3.  Both are correct, but the second isn't really canonical.
This patch therefore keeps track of which CC values are possible
and uses this when inverting a mask.

Although this is mostly cosmestic, it fixes undefined behavior
for the CIJNLH in branch-08.ll.  Another fix would have been
to mask out bit 0 when generating the fused compare and branch,
but the point of this patch is that we shouldn't need to do that
in the first place.

The patch also makes it easier to reuse CC results from other instructions.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@187495 91177308-0d34-0410-b5e6-96231b3b80d8
2013-07-31 12:30:20 +00:00

125 lines
3.1 KiB
LLVM

; Test STOCGs that are presented as selects.
;
; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
declare void @foo(i64 *)
; Test with the loaded value first.
define void @f1(i64 *%ptr, i64 %alt, i32 %limit) {
; CHECK-LABEL: f1:
; CHECK: clfi %r4, 42
; CHECK: stocghe %r3, 0(%r2)
; CHECK: br %r14
%cond = icmp ult i32 %limit, 42
%orig = load i64 *%ptr
%res = select i1 %cond, i64 %orig, i64 %alt
store i64 %res, i64 *%ptr
ret void
}
; ...and with the loaded value second
define void @f2(i64 *%ptr, i64 %alt, i32 %limit) {
; CHECK-LABEL: f2:
; CHECK: clfi %r4, 42
; CHECK: stocgl %r3, 0(%r2)
; CHECK: br %r14
%cond = icmp ult i32 %limit, 42
%orig = load i64 *%ptr
%res = select i1 %cond, i64 %alt, i64 %orig
store i64 %res, i64 *%ptr
ret void
}
; Check the high end of the aligned STOCG range.
define void @f3(i64 *%base, i64 %alt, i32 %limit) {
; CHECK-LABEL: f3:
; CHECK: clfi %r4, 42
; CHECK: stocghe %r3, 524280(%r2)
; CHECK: br %r14
%ptr = getelementptr i64 *%base, i64 65535
%cond = icmp ult i32 %limit, 42
%orig = load i64 *%ptr
%res = select i1 %cond, i64 %orig, i64 %alt
store i64 %res, i64 *%ptr
ret void
}
; Check the next doubleword up. Other sequences besides this one would be OK.
define void @f4(i64 *%base, i64 %alt, i32 %limit) {
; CHECK-LABEL: f4:
; CHECK: agfi %r2, 524288
; CHECK: clfi %r4, 42
; CHECK: stocghe %r3, 0(%r2)
; CHECK: br %r14
%ptr = getelementptr i64 *%base, i64 65536
%cond = icmp ult i32 %limit, 42
%orig = load i64 *%ptr
%res = select i1 %cond, i64 %orig, i64 %alt
store i64 %res, i64 *%ptr
ret void
}
; Check the low end of the STOCG range.
define void @f5(i64 *%base, i64 %alt, i32 %limit) {
; CHECK-LABEL: f5:
; CHECK: clfi %r4, 42
; CHECK: stocghe %r3, -524288(%r2)
; CHECK: br %r14
%ptr = getelementptr i64 *%base, i64 -65536
%cond = icmp ult i32 %limit, 42
%orig = load i64 *%ptr
%res = select i1 %cond, i64 %orig, i64 %alt
store i64 %res, i64 *%ptr
ret void
}
; Check the next doubleword down, with the same comments as f4.
define void @f6(i64 *%base, i64 %alt, i32 %limit) {
; CHECK-LABEL: f6:
; CHECK: agfi %r2, -524296
; CHECK: clfi %r4, 42
; CHECK: stocghe %r3, 0(%r2)
; CHECK: br %r14
%ptr = getelementptr i64 *%base, i64 -65537
%cond = icmp ult i32 %limit, 42
%orig = load i64 *%ptr
%res = select i1 %cond, i64 %orig, i64 %alt
store i64 %res, i64 *%ptr
ret void
}
; Try a frame index base.
define void @f7(i64 %alt, i32 %limit) {
; CHECK-LABEL: f7:
; CHECK: brasl %r14, foo@PLT
; CHECK: stocghe {{%r[0-9]+}}, {{[0-9]+}}(%r15)
; CHECK: brasl %r14, foo@PLT
; CHECK: br %r14
%ptr = alloca i64
call void @foo(i64 *%ptr)
%cond = icmp ult i32 %limit, 42
%orig = load i64 *%ptr
%res = select i1 %cond, i64 %orig, i64 %alt
store i64 %res, i64 *%ptr
call void @foo(i64 *%ptr)
ret void
}
; Test that conditionally-executed stores do not use STOC, since STOC
; is allowed to trap even when the condition is false.
define void @f8(i64 %a, i64 %b, i64 *%dest) {
; CHECK-LABEL: f8:
; CHECK-NOT: stocg %r3, 0(%r4)
; CHECK: br %r14
entry:
%cmp = icmp ule i64 %a, %b
br i1 %cmp, label %store, label %exit
store:
store i64 %b, i64 *%dest
br label %exit
exit:
ret void
}