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https://github.com/c64scene-ar/llvm-6502.git
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c7c7e1502a
Follows the same lines as r186686, but much more limited, since we only use ADD LOGICAL for multi-i64 additions. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@186689 91177308-0d34-0410-b5e6-96231b3b80d8
57 lines
1.3 KiB
LLVM
57 lines
1.3 KiB
LLVM
; Test 128-bit addition in which the second operand is constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; Check additions of 1. The XOR ensures that we don't instead load the
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; constant into a register and use memory addition.
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define void @f1(i128 *%aptr) {
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; CHECK-LABEL: f1:
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; CHECK: algfi {{%r[0-5]}}, 1
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; CHECK: alcgr
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; CHECK: br %r14
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%a = load i128 *%aptr
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%xor = xor i128 %a, 128
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%add = add i128 %xor, 1
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store i128 %add, i128 *%aptr
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ret void
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}
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; Check the high end of the ALGFI range.
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define void @f2(i128 *%aptr) {
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; CHECK-LABEL: f2:
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; CHECK: algfi {{%r[0-5]}}, 4294967295
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; CHECK: alcgr
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; CHECK: br %r14
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%a = load i128 *%aptr
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%xor = xor i128 %a, 128
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%add = add i128 %xor, 4294967295
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store i128 %add, i128 *%aptr
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ret void
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}
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; Check the next value up, which must use register addition.
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define void @f3(i128 *%aptr) {
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; CHECK-LABEL: f3:
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; CHECK: algr
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; CHECK: alcgr
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; CHECK: br %r14
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%a = load i128 *%aptr
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%xor = xor i128 %a, 128
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%add = add i128 %xor, 4294967296
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store i128 %add, i128 *%aptr
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ret void
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}
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; Check addition of -1, which must also use register addition.
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define void @f4(i128 *%aptr) {
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; CHECK-LABEL: f4:
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; CHECK: algr
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; CHECK: alcgr
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; CHECK: br %r14
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%a = load i128 *%aptr
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%xor = xor i128 %a, 128
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%add = add i128 %xor, -1
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store i128 %add, i128 *%aptr
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ret void
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}
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