llvm-6502/test/CodeGen
Sanjay Patel 4dad5f2731 add X86 load folding tests for unary math ops
X86 load folding is fragile; eg, the tests here
don't work without AVX even though they should. This
is because we have a mix of tablegen patterns that have
been added over time, and we have a load folding table
used by the peephole optimizer that has to be kept in 
sync with the ever-changing ISA and tablegen defs.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229870 91177308-0d34-0410-b5e6-96231b3b80d8
2015-02-19 16:59:11 +00:00
..
AArch64
ARM llvm-mc: Use Target::createNullStreamer to fix crashes on target-specific asm directives. 2015-02-19 00:45:04 +00:00
BPF
CPP
Generic
Hexagon
Inputs
Mips [mips][microMIPS] Make usage of AND16, OR16 and XOR16 by code generator 2015-02-19 11:51:32 +00:00
MSP430
NVPTX
PowerPC This patch adds the VSX logical instructions introduced in the Power ISA 2.07. It also removes the added complexity that favors VMX versions of the three instructions. 2015-02-18 16:21:46 +00:00
R600
SPARC
SystemZ
Thumb
Thumb2
X86 add X86 load folding tests for unary math ops 2015-02-19 16:59:11 +00:00
XCore