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https://github.com/c64scene-ar/llvm-6502.git
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97fd27a436
Adapted from the llvm.SI.sample test. Reviewed-by: Christian König <christian.koenig@amd.com> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181425 91177308-0d34-0410-b5e6-96231b3b80d8
88 lines
3.7 KiB
LLVM
88 lines
3.7 KiB
LLVM
;RUN: llc < %s -march=r600 -mcpu=verde | FileCheck %s
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 15, 0, 0, -1
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+_VGPR[0-9]+}}, 3, 0, 0, 0
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+}}, 2, 0, 0, 0
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+}}, 1, 0, 0, 0
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+}}, 4, 0, 0, 0
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+}}, 8, 0, 0, 0
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+_VGPR[0-9]+}}, 5, 0, 0, 0
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+_VGPR[0-9]+}}, 12, 0, 0, -1
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+_VGPR[0-9]+_VGPR[0-9]+}}, 7, 0, 0, 0
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;CHECK: IMAGE_LOAD_MIP {{VGPR[0-9]+}}, 8, 0, 0, -1
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define void @test(i32 %a1, i32 %a2, i32 %a3, i32 %a4) {
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%v1 = insertelement <4 x i32> undef, i32 %a1, i32 0
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%v2 = insertelement <4 x i32> undef, i32 %a1, i32 1
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%v3 = insertelement <4 x i32> undef, i32 %a1, i32 2
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%v4 = insertelement <4 x i32> undef, i32 %a1, i32 3
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%v5 = insertelement <4 x i32> undef, i32 %a2, i32 0
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%v6 = insertelement <4 x i32> undef, i32 %a2, i32 1
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%v10 = insertelement <4 x i32> undef, i32 %a3, i32 1
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%v11 = insertelement <4 x i32> undef, i32 %a3, i32 2
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%v15 = insertelement <4 x i32> undef, i32 %a4, i32 2
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%v16 = insertelement <4 x i32> undef, i32 %a4, i32 3
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%res1 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v1,
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<8 x i32> undef, i32 1)
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%res2 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v2,
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<8 x i32> undef, i32 2)
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%res3 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v3,
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<8 x i32> undef, i32 3)
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%res4 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v4,
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<8 x i32> undef, i32 4)
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%res5 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v5,
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<8 x i32> undef, i32 5)
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%res6 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v6,
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<8 x i32> undef, i32 6)
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%res10 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v10,
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<8 x i32> undef, i32 10)
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%res11 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v11,
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<8 x i32> undef, i32 11)
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%res15 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v15,
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<8 x i32> undef, i32 15)
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%res16 = call <4 x i32> @llvm.SI.imageload.(<4 x i32> %v16,
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<8 x i32> undef, i32 16)
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%e1 = extractelement <4 x i32> %res1, i32 0
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%e2 = extractelement <4 x i32> %res2, i32 1
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%e3 = extractelement <4 x i32> %res3, i32 2
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%e4 = extractelement <4 x i32> %res4, i32 3
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%t0 = extractelement <4 x i32> %res5, i32 0
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%t1 = extractelement <4 x i32> %res5, i32 1
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%e5 = add i32 %t0, %t1
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%t2 = extractelement <4 x i32> %res6, i32 0
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%t3 = extractelement <4 x i32> %res6, i32 2
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%e6 = add i32 %t2, %t3
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%t10 = extractelement <4 x i32> %res10, i32 2
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%t11 = extractelement <4 x i32> %res10, i32 3
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%e10 = add i32 %t10, %t11
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%t12 = extractelement <4 x i32> %res11, i32 0
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%t13 = extractelement <4 x i32> %res11, i32 1
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%t14 = extractelement <4 x i32> %res11, i32 2
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%t15 = add i32 %t12, %t13
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%e11 = add i32 %t14, %t15
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%t28 = extractelement <4 x i32> %res15, i32 0
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%t29 = extractelement <4 x i32> %res15, i32 1
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%t30 = extractelement <4 x i32> %res15, i32 2
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%t31 = extractelement <4 x i32> %res15, i32 3
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%t32 = add i32 %t28, %t29
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%t33 = add i32 %t30, %t31
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%e15 = add i32 %t32, %t33
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%e16 = extractelement <4 x i32> %res16, i32 3
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%s1 = add i32 %e1, %e2
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%s2 = add i32 %s1, %e3
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%s3 = add i32 %s2, %e4
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%s4 = add i32 %s3, %e5
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%s5 = add i32 %s4, %e6
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%s9 = add i32 %s5, %e10
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%s10 = add i32 %s9, %e11
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%s14 = add i32 %s10, %e15
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%s15 = add i32 %s14, %e16
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%s16 = bitcast i32 %s15 to float
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call void @llvm.SI.export(i32 15, i32 0, i32 1, i32 12, i32 0, float %s16, float %s16, float %s16, float %s16)
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ret void
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}
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declare <4 x i32> @llvm.SI.imageload.(<4 x i32>, <8 x i32>, i32) readnone
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declare void @llvm.SI.export(i32, i32, i32, i32, i32, float, float, float, float)
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