Craig Topper b96a393b09 Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@192266 91177308-0d34-0410-b5e6-96231b3b80d8		2013-10-09 02:18:34 +00:00
..
AArch64	[AArch64] Add support for NEON scalar floating-point reciprocal estimate,	2013-10-08 22:09:04 +00:00
ARM	Struct byval: use the correct alignment for loads generated to load	2013-10-07 19:47:53 +00:00
CPP
Generic	Change objectsize intrinsic to accept different address spaces.	2013-10-07 18:06:48 +00:00
Hexagon	TBAA: remove !tbaa from testing cases when they are not needed.	2013-09-30 18:17:35 +00:00
Inputs
Mips	Add fabsf to the list of inlined functions; otherwise	2013-10-08 19:55:01 +00:00
MSP430
NVPTX	[NVPTX] Make constant vector test case endian-independent	2013-09-19 13:14:44 +00:00
PowerPC	TBAA: update tbaa format from scalar format to struct-path aware format.	2013-09-30 18:17:55 +00:00
R600	Add some xfaild R600 tests.	2013-10-08 18:06:36 +00:00
SPARC	[Sparc] Do not emit nop after fcmp* instruction with V9.	2013-10-06 07:06:44 +00:00
SystemZ	[SystemZ] Add comparisons of high words and memory	2013-10-01 15:00:44 +00:00
Thumb	ARM: Use "dmb sy" for barriers on M-class CPUs	2013-08-28 14:39:19 +00:00
Thumb2	Fix spelling intruction -> instruction.	2013-09-28 11:46:15 +00:00
X86	Add in64BitMode/in32BitMode to the MMX/SSE2/AVX maskmovq/dq instructions. This way the asm parser will pick the right one based on the mode. Instruction selection already did the right thing based on the pointer size.	2013-10-09 02:18:34 +00:00
XCore	XCore handling of thread local lowering	2013-09-09 10:42:11 +00:00