mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-07-21 18:29:45 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
86 lines
3.1 KiB
LLVM
86 lines
3.1 KiB
LLVM
; RUN: llc -mtriple=arm-eabi -float-abi=soft -mattr=+neon %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-LE
|
|
; RUN: llc -mtriple=armeb-eabi -float-abi=soft -mattr=+neon %s -o - | FileCheck %s -check-prefix=CHECK -check-prefix=CHECK-BE
|
|
|
|
define <16 x i8> @vcombine8(<8 x i8>* %A, <8 x i8>* %B) nounwind {
|
|
; CHECK: vcombine8
|
|
; CHECK-LE: vmov r0, r1, d16
|
|
; CHECK-LE: vmov r2, r3, d17
|
|
; CHECK-BE: vmov r1, r0, d16
|
|
; CHECK-BE: vmov r3, r2, d17
|
|
%tmp1 = load <8 x i8>, <8 x i8>* %A
|
|
%tmp2 = load <8 x i8>, <8 x i8>* %B
|
|
%tmp3 = shufflevector <8 x i8> %tmp1, <8 x i8> %tmp2, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
|
ret <16 x i8> %tmp3
|
|
}
|
|
|
|
define <8 x i16> @vcombine16(<4 x i16>* %A, <4 x i16>* %B) nounwind {
|
|
; CHECK: vcombine16
|
|
; CHECK-LE: vmov r0, r1, d16
|
|
; CHECK-LE: vmov r2, r3, d17
|
|
; CHECK-BE: vmov r1, r0, d16
|
|
; CHECK-BE: vmov r3, r2, d17
|
|
%tmp1 = load <4 x i16>, <4 x i16>* %A
|
|
%tmp2 = load <4 x i16>, <4 x i16>* %B
|
|
%tmp3 = shufflevector <4 x i16> %tmp1, <4 x i16> %tmp2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
|
|
ret <8 x i16> %tmp3
|
|
}
|
|
|
|
define <4 x i32> @vcombine32(<2 x i32>* %A, <2 x i32>* %B) nounwind {
|
|
; CHECK: vcombine32
|
|
; CHECK-LE: vmov r0, r1, d16
|
|
; CHECK-LE: vmov r2, r3, d17
|
|
; CHECK-BE: vmov r1, r0, d16
|
|
; CHECK-BE: vmov r3, r2, d17
|
|
%tmp1 = load <2 x i32>, <2 x i32>* %A
|
|
%tmp2 = load <2 x i32>, <2 x i32>* %B
|
|
%tmp3 = shufflevector <2 x i32> %tmp1, <2 x i32> %tmp2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
ret <4 x i32> %tmp3
|
|
}
|
|
|
|
define <4 x float> @vcombinefloat(<2 x float>* %A, <2 x float>* %B) nounwind {
|
|
; CHECK: vcombinefloat
|
|
; CHECK-LE: vmov r0, r1, d16
|
|
; CHECK-LE: vmov r2, r3, d17
|
|
; CHECK-BE: vmov r1, r0, d16
|
|
; CHECK-BE: vmov r3, r2, d17
|
|
%tmp1 = load <2 x float>, <2 x float>* %A
|
|
%tmp2 = load <2 x float>, <2 x float>* %B
|
|
%tmp3 = shufflevector <2 x float> %tmp1, <2 x float> %tmp2, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
ret <4 x float> %tmp3
|
|
}
|
|
|
|
define <2 x i64> @vcombine64(<1 x i64>* %A, <1 x i64>* %B) nounwind {
|
|
; CHECK: vcombine64
|
|
; CHECK-LE: vmov r0, r1, d16
|
|
; CHECK-LE: vmov r2, r3, d17
|
|
; CHECK-BE: vmov r1, r0, d16
|
|
; CHECK-BE: vmov r3, r2, d17
|
|
%tmp1 = load <1 x i64>, <1 x i64>* %A
|
|
%tmp2 = load <1 x i64>, <1 x i64>* %B
|
|
%tmp3 = shufflevector <1 x i64> %tmp1, <1 x i64> %tmp2, <2 x i32> <i32 0, i32 1>
|
|
ret <2 x i64> %tmp3
|
|
}
|
|
|
|
; Check for vget_low and vget_high implemented with shufflevector. PR8411.
|
|
; They should not require storing to the stack.
|
|
|
|
define <4 x i16> @vget_low16(<8 x i16>* %A) nounwind {
|
|
; CHECK: vget_low16
|
|
; CHECK-NOT: vst
|
|
; CHECK-LE: vmov r0, r1, d16
|
|
; CHECK-BE: vmov r1, r0, d16
|
|
%tmp1 = load <8 x i16>, <8 x i16>* %A
|
|
%tmp2 = shufflevector <8 x i16> %tmp1, <8 x i16> undef, <4 x i32> <i32 0, i32 1, i32 2, i32 3>
|
|
ret <4 x i16> %tmp2
|
|
}
|
|
|
|
define <8 x i8> @vget_high8(<16 x i8>* %A) nounwind {
|
|
; CHECK: vget_high8
|
|
; CHECK-NOT: vst
|
|
; CHECK-LE: vmov r0, r1, d17
|
|
; CHECK-BE: vmov r1, r0, d16
|
|
%tmp1 = load <16 x i8>, <16 x i8>* %A
|
|
%tmp2 = shufflevector <16 x i8> %tmp1, <16 x i8> undef, <8 x i32> <i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15>
|
|
ret <8 x i8> %tmp2
|
|
}
|