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49683f3c96
The new target machines are: nvptx (old ptx32) => 32-bit PTX nvptx64 (old ptx64) => 64-bit PTX The sources are based on the internal NVIDIA NVPTX back-end, and contain more functionality than the current PTX back-end currently provides. NV_CONTRIB git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156196 91177308-0d34-0410-b5e6-96231b3b80d8
48 lines
1.3 KiB
C++
48 lines
1.3 KiB
C++
//===-- llvm/lib/Target/NVPTX/NVPTXLowerAggrCopies.h ------------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains the declaration of the NVIDIA specific lowering of
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// aggregate copies
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//
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//===----------------------------------------------------------------------===//
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#ifndef NVPTX_LOWER_AGGR_COPIES_H
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#define NVPTX_LOWER_AGGR_COPIES_H
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#include "llvm/Pass.h"
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#include "llvm/CodeGen/MachineFunctionAnalysis.h"
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#include "llvm/Target/TargetData.h"
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namespace llvm {
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// actual analysis class, which is a functionpass
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struct NVPTXLowerAggrCopies : public FunctionPass {
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static char ID;
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NVPTXLowerAggrCopies() : FunctionPass(ID) {}
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void getAnalysisUsage(AnalysisUsage &AU) const {
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AU.addRequired<TargetData>();
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AU.addPreserved<MachineFunctionAnalysis>();
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}
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virtual bool runOnFunction(Function &F);
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static const unsigned MaxAggrCopySize = 128;
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virtual const char *getPassName() const {
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return "Lower aggregate copies/intrinsics into loops";
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}
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};
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extern FunctionPass *createLowerAggrCopies();
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}
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#endif
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