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28dc98f752
DAGTypeLegalizer::ExpandShiftWithKnownAmountBit. In terms of restoring the optimization, the best fix here isn't obvious... any ideas? git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@61119 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
792 B
LLVM
20 lines
792 B
LLVM
; RUN: llvm-as < %s | llc | not grep shrl
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; Note: this test is really trying to make sure that the shift
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; returns the right result; shrl is most likely wrong,
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; but if CodeGen starts legitimately using an shrl here,
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; please adjust the test appropriately.
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
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target triple = "i386-pc-linux-gnu"
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@.str = internal constant [6 x i8] c"%lld\0A\00" ; <[6 x i8]*> [#uses=1]
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define i64 @mebbe_shift(i32 %xx, i32 %test) nounwind {
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entry:
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%conv = zext i32 %xx to i64 ; <i64> [#uses=1]
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%tobool = icmp ne i32 %test, 0 ; <i1> [#uses=1]
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%shl = select i1 %tobool, i64 3, i64 0 ; <i64> [#uses=1]
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%x.0 = shl i64 %conv, %shl ; <i64> [#uses=1]
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ret i64 %x.0
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}
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