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https://github.com/c64scene-ar/llvm-6502.git
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65e90c0364
MCTargetDesc/PPCMCCodeEmitter.cpp current has code like: if (isSVR4ABI() && is64BitMode()) Fixups.push_back(MCFixup::Create(0, MO.getExpr(), (MCFixupKind)PPC::fixup_ppc_toc16)); else Fixups.push_back(MCFixup::Create(0, MO.getExpr(), (MCFixupKind)PPC::fixup_ppc_lo16)); This is a problem for the asm parser, since it requires knowledge of the ABI / 64-bit mode to be set up. However, more fundamentally, at this point we shouldn't make such distinctions anyway; in an assembler file, it always ought to be possible to e.g. generate TOC relocations even when the main ABI is one that doesn't use TOC. Fortunately, this is actually completely unnecessary; that code was added to decide whether to generate TOC relocations, but that information is in fact already encoded in the VariantKind of the underlying symbol. This commit therefore merges those fixup types into one, and then decides which relocation to use based on the VariantKind. No changes in generated code. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@178007 91177308-0d34-0410-b5e6-96231b3b80d8
196 lines
6.2 KiB
C++
196 lines
6.2 KiB
C++
//===-- PPCAsmBackend.cpp - PPC Assembler Backend -------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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#include "MCTargetDesc/PPCMCTargetDesc.h"
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#include "MCTargetDesc/PPCFixupKinds.h"
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#include "llvm/MC/MCAsmBackend.h"
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#include "llvm/MC/MCELFObjectWriter.h"
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#include "llvm/MC/MCFixupKindInfo.h"
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#include "llvm/MC/MCMachObjectWriter.h"
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#include "llvm/MC/MCObjectWriter.h"
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#include "llvm/MC/MCSectionMachO.h"
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#include "llvm/MC/MCValue.h"
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#include "llvm/Object/MachOFormat.h"
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#include "llvm/Support/ELF.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm;
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static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
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switch (Kind) {
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default:
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llvm_unreachable("Unknown fixup kind!");
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case FK_Data_1:
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case FK_Data_2:
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case FK_Data_4:
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case FK_Data_8:
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case PPC::fixup_ppc_tlsreg:
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case PPC::fixup_ppc_nofixup:
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return Value;
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case PPC::fixup_ppc_brcond14:
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return Value & 0xfffc;
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case PPC::fixup_ppc_br24:
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return Value & 0x3fffffc;
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#if 0
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case PPC::fixup_ppc_hi16:
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return (Value >> 16) & 0xffff;
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#endif
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case PPC::fixup_ppc_ha16:
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return ((Value >> 16) + ((Value & 0x8000) ? 1 : 0)) & 0xffff;
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case PPC::fixup_ppc_lo16:
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return Value & 0xffff;
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case PPC::fixup_ppc_lo16_ds:
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return Value & 0xfffc;
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}
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}
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namespace {
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class PPCMachObjectWriter : public MCMachObjectTargetWriter {
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public:
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PPCMachObjectWriter(bool Is64Bit, uint32_t CPUType,
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uint32_t CPUSubtype)
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: MCMachObjectTargetWriter(Is64Bit, CPUType, CPUSubtype) {}
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void RecordRelocation(MachObjectWriter *Writer,
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const MCAssembler &Asm, const MCAsmLayout &Layout,
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const MCFragment *Fragment, const MCFixup &Fixup,
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MCValue Target, uint64_t &FixedValue) {
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llvm_unreachable("Relocation emission for MachO/PPC unimplemented!");
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}
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};
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class PPCAsmBackend : public MCAsmBackend {
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const Target &TheTarget;
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public:
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PPCAsmBackend(const Target &T) : MCAsmBackend(), TheTarget(T) {}
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unsigned getNumFixupKinds() const { return PPC::NumTargetFixupKinds; }
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const MCFixupKindInfo &getFixupKindInfo(MCFixupKind Kind) const {
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const static MCFixupKindInfo Infos[PPC::NumTargetFixupKinds] = {
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// name offset bits flags
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{ "fixup_ppc_br24", 6, 24, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_ppc_brcond14", 16, 14, MCFixupKindInfo::FKF_IsPCRel },
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{ "fixup_ppc_lo16", 16, 16, 0 },
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{ "fixup_ppc_ha16", 16, 16, 0 },
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{ "fixup_ppc_lo16_ds", 16, 14, 0 },
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{ "fixup_ppc_tlsreg", 0, 0, 0 },
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{ "fixup_ppc_nofixup", 0, 0, 0 }
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};
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if (Kind < FirstTargetFixupKind)
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return MCAsmBackend::getFixupKindInfo(Kind);
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assert(unsigned(Kind - FirstTargetFixupKind) < getNumFixupKinds() &&
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"Invalid kind!");
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return Infos[Kind - FirstTargetFixupKind];
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}
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void applyFixup(const MCFixup &Fixup, char *Data, unsigned DataSize,
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uint64_t Value) const {
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Value = adjustFixupValue(Fixup.getKind(), Value);
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if (!Value) return; // Doesn't change encoding.
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unsigned Offset = Fixup.getOffset();
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// For each byte of the fragment that the fixup touches, mask in the bits
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// from the fixup value. The Value has been "split up" into the appropriate
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// bitfields above.
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for (unsigned i = 0; i != 4; ++i)
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Data[Offset + i] |= uint8_t((Value >> ((4 - i - 1)*8)) & 0xff);
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}
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bool mayNeedRelaxation(const MCInst &Inst) const {
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// FIXME.
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return false;
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}
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bool fixupNeedsRelaxation(const MCFixup &Fixup,
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uint64_t Value,
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const MCRelaxableFragment *DF,
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const MCAsmLayout &Layout) const {
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// FIXME.
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llvm_unreachable("relaxInstruction() unimplemented");
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}
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void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
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// FIXME.
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llvm_unreachable("relaxInstruction() unimplemented");
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}
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bool writeNopData(uint64_t Count, MCObjectWriter *OW) const {
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// FIXME: Zero fill for now. That's not right, but at least will get the
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// section size right.
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for (uint64_t i = 0; i != Count; ++i)
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OW->Write8(0);
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return true;
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}
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unsigned getPointerSize() const {
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StringRef Name = TheTarget.getName();
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if (Name == "ppc64") return 8;
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assert(Name == "ppc32" && "Unknown target name!");
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return 4;
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}
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};
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} // end anonymous namespace
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// FIXME: This should be in a separate file.
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namespace {
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class DarwinPPCAsmBackend : public PPCAsmBackend {
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public:
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DarwinPPCAsmBackend(const Target &T) : PPCAsmBackend(T) { }
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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bool is64 = getPointerSize() == 8;
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return createMachObjectWriter(new PPCMachObjectWriter(
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/*Is64Bit=*/is64,
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(is64 ? object::mach::CTM_PowerPC64 :
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object::mach::CTM_PowerPC),
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object::mach::CSPPC_ALL),
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OS, /*IsLittleEndian=*/false);
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}
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virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
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return false;
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}
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};
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class ELFPPCAsmBackend : public PPCAsmBackend {
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uint8_t OSABI;
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public:
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ELFPPCAsmBackend(const Target &T, uint8_t OSABI) :
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PPCAsmBackend(T), OSABI(OSABI) { }
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MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
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bool is64 = getPointerSize() == 8;
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return createPPCELFObjectWriter(OS, is64, OSABI);
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}
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virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
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return false;
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}
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};
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} // end anonymous namespace
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MCAsmBackend *llvm::createPPCAsmBackend(const Target &T, StringRef TT, StringRef CPU) {
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if (Triple(TT).isOSDarwin())
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return new DarwinPPCAsmBackend(T);
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uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(Triple(TT).getOS());
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return new ELFPPCAsmBackend(T, OSABI);
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}
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