Hal Finkel b99c995825 Spill and restore PPC CR registers using the FP when we have one ... For functions that need to spill CRs, and have dynamic stack allocations, the value of the SP during the restore is not what it was during the save, and so we need to use the FP in these cases (as for all of the other spills and restores, but the CR restore has a special code path because its reserved slot, like the link register, is specified directly relative to the adjusted SP). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179457 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-13 08:09:20 +00:00
..
AArch64	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
ARM	Replace coff-/elf-dump with llvm-readobj	2013-04-12 04:06:46 +00:00
CPP
Generic	XFAIL some of the generic CodeGen tests for Hexagon.	2013-03-25 21:04:16 +00:00
Hexagon	Hexagon: Enable SupportDebugInfomation and DwarfInSection flags.	2013-03-28 19:34:49 +00:00
Inputs	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
MBlaze
Mips	[mips] Reapply r179420 and r179421.	2013-04-13 00:55:41 +00:00
MSP430
NVPTX	[NVPTX] Remove support for SM < 2.0. This was never fully supported anyway.	2013-03-30 14:29:30 +00:00
PowerPC	Spill and restore PPC CR registers using the FP when we have one	2013-04-13 08:09:20 +00:00
R600	R600/SI: Add pattern for AMDGPUurecip	2013-04-10 17:17:56 +00:00
SI
SPARC	Compute correct frame sizes for SPARC v9 64-bit frames.	2013-04-09 04:37:47 +00:00
Thumb	Revert "Adding DIImportedModules to DIScopes."	2013-03-28 02:44:59 +00:00
Thumb2
X86	Further generalize this scheduler test.	2013-04-13 07:37:27 +00:00
XCore