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f4f60b10e4
getInvertedPredicatedOpcode() functions instead of switch cases. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181530 91177308-0d34-0410-b5e6-96231b3b80d8
31 lines
1.0 KiB
LLVM
31 lines
1.0 KiB
LLVM
; RUN: llc -march=hexagon -mcpu=hexagonv4 < %s | FileCheck %s
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; Check that we are able to predicate instructions.
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; CHECK: if{{ *}}({{!*}}p{{[0-3]}}{{[.new]*}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}{{and|aslh}}
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; CHECK: if{{ *}}({{!*}}p{{[0-3]}}{{[.new]*}}){{ *}}r{{[0-9]+}}{{ *}}={{ *}}{{and|aslh}}
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@a = external global i32
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@d = external global i32
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; Function Attrs: nounwind
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define i32 @test1(i8 zeroext %la, i8 zeroext %lb) {
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entry:
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%cmp = icmp eq i8 %la, %lb
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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%conv1 = zext i8 %la to i32
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%shl = shl nuw nsw i32 %conv1, 16
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br label %if.end
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if.else: ; preds = %entry
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%and8 = and i8 %lb, %la
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%and = zext i8 %and8 to i32
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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%storemerge = phi i32 [ %and, %if.else ], [ %shl, %if.then ]
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store i32 %storemerge, i32* @a, align 4
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%0 = load i32* @d, align 4
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ret i32 %0
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}
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