mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b503b49b51
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
78 lines
1.9 KiB
LLVM
78 lines
1.9 KiB
LLVM
; Test 64-bit atomic XORs.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check XORs of a variable.
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define i64 @f1(i64 %dummy, i64 *%src, i64 %b) {
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; CHECK: f1:
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; CHECK: lg %r2, 0(%r3)
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; CHECK: [[LABEL:\.[^ ]*]]:
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; CHECK: lgr %r0, %r2
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; CHECK: xgr %r0, %r4
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; CHECK: csg %r2, %r0, 0(%r3)
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; CHECK: j{{g?}}lh [[LABEL]]
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 %b seq_cst
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ret i64 %res
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}
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; Check the lowest useful XILF value.
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define i64 @f2(i64 %dummy, i64 *%src) {
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; CHECK: f2:
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; CHECK: lg %r2, 0(%r3)
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; CHECK: [[LABEL:\.[^ ]*]]:
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; CHECK: lgr %r0, %r2
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; CHECK: xilf %r0, 1
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; CHECK: csg %r2, %r0, 0(%r3)
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; CHECK: j{{g?}}lh [[LABEL]]
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 1 seq_cst
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ret i64 %res
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}
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; Check the high end of the XILF range.
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define i64 @f3(i64 %dummy, i64 *%src) {
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; CHECK: f3:
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; CHECK: xilf %r0, 4294967295
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 4294967295 seq_cst
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ret i64 %res
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}
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; Check the lowest useful XIHF value, which is one greater than above.
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define i64 @f4(i64 %dummy, i64 *%src) {
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; CHECK: f4:
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; CHECK: xihf %r0, 1
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 4294967296 seq_cst
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ret i64 %res
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}
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; Check the next value up, which must use a register. (We could use
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; combinations of XIH* and XIL* instead, but that isn't implemented.)
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define i64 @f5(i64 %dummy, i64 *%src) {
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; CHECK: f5:
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; CHECK: xgr
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 4294967297 seq_cst
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ret i64 %res
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}
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; Check the high end of the XIHF range.
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define i64 @f6(i64 %dummy, i64 *%src) {
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; CHECK: f6:
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; CHECK: xihf %r0, 4294967295
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 -4294967296 seq_cst
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ret i64 %res
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}
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; Check the next value up, which must use a register.
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define i64 @f7(i64 %dummy, i64 *%src) {
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; CHECK: f7:
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; CHECK: xgr
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; CHECK: br %r14
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%res = atomicrmw xor i64 *%src, i64 -4294967295 seq_cst
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ret i64 %res
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}
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