mirror of
https://github.com/c64scene-ar/llvm-6502.git
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b503b49b51
This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
2.2 KiB
LLVM
95 lines
2.2 KiB
LLVM
; Test 64-bit addition in which the second operand is variable.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check MSGR.
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define i64 @f1(i64 %a, i64 %b) {
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; CHECK: f1:
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; CHECK: msgr %r2, %r3
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; CHECK: br %r14
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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; Check MSG with no displacement.
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define i64 @f2(i64 %a, i64 *%src) {
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; CHECK: f2:
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; CHECK: msg %r2, 0(%r3)
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; CHECK: br %r14
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%b = load i64 *%src
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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; Check the high end of the aligned MSG range.
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define i64 @f3(i64 %a, i64 *%src) {
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; CHECK: f3:
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; CHECK: msg %r2, 524280(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 65535
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%b = load i64 *%ptr
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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; Check the next doubleword up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f4(i64 %a, i64 *%src) {
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; CHECK: f4:
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; CHECK: agfi %r3, 524288
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; CHECK: msg %r2, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 65536
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%b = load i64 *%ptr
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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; Check the high end of the negative aligned MSG range.
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define i64 @f5(i64 %a, i64 *%src) {
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; CHECK: f5:
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; CHECK: msg %r2, -8(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 -1
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%b = load i64 *%ptr
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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; Check the low end of the MSG range.
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define i64 @f6(i64 %a, i64 *%src) {
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; CHECK: f6:
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; CHECK: msg %r2, -524288(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 -65536
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%b = load i64 *%ptr
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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; Check the next doubleword down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define i64 @f7(i64 %a, i64 *%src) {
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; CHECK: f7:
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; CHECK: agfi %r3, -524296
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; CHECK: msg %r2, 0(%r3)
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; CHECK: br %r14
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%ptr = getelementptr i64 *%src, i64 -65537
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%b = load i64 *%ptr
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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; Check that MSG allows an index.
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define i64 @f8(i64 %a, i64 %src, i64 %index) {
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; CHECK: f8:
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; CHECK: msg %r2, 524280({{%r4,%r3|%r3,%r4}})
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; CHECK: br %r14
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%add1 = add i64 %src, %index
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%add2 = add i64 %add1, 524280
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%ptr = inttoptr i64 %add2 to i64 *
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%b = load i64 *%ptr
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%mul = mul i64 %a, %b
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ret i64 %mul
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}
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