mirror of
https://github.com/c64scene-ar/llvm-6502.git
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on 64-bit builds. Analysis and original patch by Török Edwin. Code audit found another place with the same problem, also fixed here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45746 91177308-0d34-0410-b5e6-96231b3b80d8
154 lines
4.9 KiB
C++
154 lines
4.9 KiB
C++
//===- PowerPCSubtarget.cpp - PPC Subtarget Information -------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the PPC specific subclass of TargetSubtarget.
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//
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//===----------------------------------------------------------------------===//
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#include "PPCSubtarget.h"
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#include "PPC.h"
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#include "llvm/Module.h"
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#include "llvm/Target/TargetMachine.h"
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#include "PPCGenSubtarget.inc"
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using namespace llvm;
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#if defined(__APPLE__)
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#include <mach/mach.h>
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#include <mach/mach_host.h>
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#include <mach/host_info.h>
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#include <mach/machine.h>
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/// GetCurrentPowerPCFeatures - Returns the current CPUs features.
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static const char *GetCurrentPowerPCCPU() {
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host_basic_info_data_t hostInfo;
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mach_msg_type_number_t infoCount;
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infoCount = HOST_BASIC_INFO_COUNT;
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host_info(mach_host_self(), HOST_BASIC_INFO, (host_info_t)&hostInfo,
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&infoCount);
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if (hostInfo.cpu_type != CPU_TYPE_POWERPC) return "generic";
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switch(hostInfo.cpu_subtype) {
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case CPU_SUBTYPE_POWERPC_601: return "601";
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case CPU_SUBTYPE_POWERPC_602: return "602";
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case CPU_SUBTYPE_POWERPC_603: return "603";
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case CPU_SUBTYPE_POWERPC_603e: return "603e";
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case CPU_SUBTYPE_POWERPC_603ev: return "603ev";
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case CPU_SUBTYPE_POWERPC_604: return "604";
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case CPU_SUBTYPE_POWERPC_604e: return "604e";
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case CPU_SUBTYPE_POWERPC_620: return "620";
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case CPU_SUBTYPE_POWERPC_750: return "750";
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case CPU_SUBTYPE_POWERPC_7400: return "7400";
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case CPU_SUBTYPE_POWERPC_7450: return "7450";
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case CPU_SUBTYPE_POWERPC_970: return "970";
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default: ;
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}
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return "generic";
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}
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#endif
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PPCSubtarget::PPCSubtarget(const TargetMachine &tm, const Module &M,
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const std::string &FS, bool is64Bit)
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: TM(tm)
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, StackAlignment(16)
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, IsGigaProcessor(false)
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, Has64BitSupport(false)
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, Use64BitRegs(false)
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, IsPPC64(is64Bit)
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, HasAltivec(false)
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, HasFSQRT(false)
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, HasSTFIWX(false)
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, HasLazyResolverStubs(false)
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, DarwinVers(0) {
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// Determine default and user specified characteristics
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std::string CPU = "generic";
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#if defined(__APPLE__)
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CPU = GetCurrentPowerPCCPU();
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#endif
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// Parse features string.
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ParseSubtargetFeatures(FS, CPU);
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// If we are generating code for ppc64, verify that options make sense.
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if (is64Bit) {
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if (!has64BitSupport()) {
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cerr << "PPC: Generation of 64-bit code for a 32-bit processor "
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<< "requested. Ignoring 32-bit processor feature.\n";
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Has64BitSupport = true;
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}
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// Silently force 64-bit register use on ppc64.
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Use64BitRegs = true;
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}
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// If the user requested use of 64-bit regs, but the cpu selected doesn't
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// support it, warn and ignore.
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if (use64BitRegs() && !has64BitSupport()) {
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cerr << "PPC: 64-bit registers requested on CPU without support. "
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<< "Disabling 64-bit register use.\n";
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Use64BitRegs = false;
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}
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// Set the boolean corresponding to the current target triple, or the default
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// if one cannot be determined, to true.
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const std::string &TT = M.getTargetTriple();
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if (TT.length() > 7) {
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// Determine which version of darwin this is.
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size_t DarwinPos = TT.find("-darwin");
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if (DarwinPos != std::string::npos) {
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if (isdigit(TT[DarwinPos+7]))
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DarwinVers = atoi(&TT[DarwinPos+7]);
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else
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DarwinVers = 8; // Minimum supported darwin is Tiger.
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}
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} else if (TT.empty()) {
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// Try to autosense the subtarget from the host compiler.
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#if defined(__APPLE__)
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#if __APPLE_CC__ > 5400
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DarwinVers = 9; // GCC 5400+ is Leopard.
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#else
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DarwinVers = 8; // Minimum supported darwin is Tiger.
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#endif
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#endif
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}
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// Set up darwin-specific properties.
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if (isDarwin()) {
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HasLazyResolverStubs = true;
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AsmFlavor = NewMnemonic;
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} else {
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AsmFlavor = OldMnemonic;
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}
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}
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/// SetJITMode - This is called to inform the subtarget info that we are
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/// producing code for the JIT.
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void PPCSubtarget::SetJITMode() {
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// JIT mode doesn't want lazy resolver stubs, it knows exactly where
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// everything is. This matters for PPC64, which codegens in PIC mode without
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// stubs.
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HasLazyResolverStubs = false;
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}
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/// hasLazyResolverStub - Return true if accesses to the specified global have
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/// to go through a dyld lazy resolution stub. This means that an extra load
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/// is required to get the address of the global.
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bool PPCSubtarget::hasLazyResolverStub(const GlobalValue *GV) const {
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// We never hae stubs if HasLazyResolverStubs=false or if in static mode.
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if (!HasLazyResolverStubs || TM.getRelocationModel() == Reloc::Static)
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return false;
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return GV->hasWeakLinkage() || GV->hasLinkOnceLinkage() ||
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(GV->isDeclaration() && !GV->hasNotBeenReadFromBitcode());
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}
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