Bill Wendling 0f63075613 Proper encoding for VLDM and VSTM instructions. The register lists for these ... instructions have to distinguish between lists of single- and double-precision registers in order for the ASM matcher to do a proper job. In all other respects, a list of single- or double-precision registers are the same as a list of GPR registers. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@119460 91177308-0d34-0410-b5e6-96231b3b80d8		2010-11-17 04:32:08 +00:00
..
ARM	Proper encoding for VLDM and VSTM instructions. The register lists for these	2010-11-17 04:32:08 +00:00
AsmParser	Parse and remember discriminators in .loc line. I try to output them with	2010-11-13 03:18:27 +00:00
COFF	Unbreak test on non-COFF targets.	2010-10-16 11:27:13 +00:00
Disassembler	Segregate tests by target.	2010-11-14 18:14:32 +00:00
ELF	A bit more of gnu as compatibility when handling relocations with aliases.	2010-11-16 04:11:46 +00:00
MachO	Change the 11 byte nop to be a single instruction.	2010-11-15 23:10:30 +00:00
MBlaze	1. Adding test cases for MBlaze MC disassembler.	2010-11-13 02:37:59 +00:00
X86	accept lret as an alias for lretl, fixing the reopened part of PR8592	2010-11-12 18:54:56 +00:00