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This adds all CodeGen tests for the SystemZ target. This version of the patch incorporates feedback from a review by Sean Silva. Thanks to all reviewers! Patch by Richard Sandiford. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181204 91177308-0d34-0410-b5e6-96231b3b80d8
140 lines
3.7 KiB
LLVM
140 lines
3.7 KiB
LLVM
; Test 32-bit unsigned comparisons between memory and a constant.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check ordered comparisons with a constant near the low end of the unsigned
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; 16-bit range.
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define double @f1(double %a, double %b, i32 *%ptr) {
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; CHECK: f1:
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; CHECK: clfhsi 0(%r2), 1
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; CHECK-NEXT: j{{g?}}h
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i32 *%ptr
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%cond = icmp ugt i32 %val, 1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check ordered comparisons with the high end of the unsigned 16-bit range.
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define double @f2(double %a, double %b, i32 *%ptr) {
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; CHECK: f2:
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; CHECK: clfhsi 0(%r2), 65535
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; CHECK-NEXT: j{{g?}}l
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i32 *%ptr
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%cond = icmp ult i32 %val, 65535
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next value up, which can't use CLFHSI.
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define double @f3(double %a, double %b, i32 *%ptr) {
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; CHECK: f3:
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; CHECK-NOT: clfhsi
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; CHECK: br %r14
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%val = load i32 *%ptr
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%cond = icmp ult i32 %val, 65536
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check equality comparisons with 32768, the lowest value for which
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; we prefer CLFHSI to CHSI.
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define double @f4(double %a, double %b, i32 *%ptr) {
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; CHECK: f4:
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; CHECK: clfhsi 0(%r2), 32768
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; CHECK-NEXT: j{{g?}}e
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i32 *%ptr
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%cond = icmp eq i32 %val, 32768
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check equality comparisons with the high end of the unsigned 16-bit range.
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define double @f5(double %a, double %b, i32 *%ptr) {
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; CHECK: f5:
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; CHECK: clfhsi 0(%r2), 65535
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; CHECK-NEXT: j{{g?}}e
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%val = load i32 *%ptr
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%cond = icmp eq i32 %val, 65535
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next value up, which can't use CLFHSI.
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define double @f6(double %a, double %b, i32 *%ptr) {
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; CHECK: f6:
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; CHECK-NOT: clfhsi
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; CHECK: br %r14
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%val = load i32 *%ptr
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%cond = icmp eq i32 %val, 65536
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the CLFHSI range.
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define double @f7(double %a, double %b, i32 %i1, i32 *%base) {
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; CHECK: f7:
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; CHECK: clfhsi 4092(%r3), 1
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; CHECK-NEXT: j{{g?}}h
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 1023
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%val = load i32 *%ptr
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%cond = icmp ugt i32 %val, 1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next word up, which needs separate address logic,
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define double @f8(double %a, double %b, i32 *%base) {
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; CHECK: f8:
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; CHECK: aghi %r2, 4096
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; CHECK: clfhsi 0(%r2), 1
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; CHECK-NEXT: j{{g?}}h
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 1024
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%val = load i32 *%ptr
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%cond = icmp ugt i32 %val, 1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check negative offsets, which also need separate address logic.
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define double @f9(double %a, double %b, i32 *%base) {
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; CHECK: f9:
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; CHECK: aghi %r2, -4
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; CHECK: clfhsi 0(%r2), 1
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; CHECK-NEXT: j{{g?}}h
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 -1
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%val = load i32 *%ptr
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%cond = icmp ugt i32 %val, 1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check that CLFHSI does not allow indices.
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define double @f10(double %a, double %b, i64 %base, i64 %index) {
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; CHECK: f10:
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; CHECK: agr {{%r2, %r3|%r3, %r2}}
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; CHECK: clfhsi 0({{%r[23]}}), 1
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; CHECK-NEXT: j{{g?}}h
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%add = add i64 %base, %index
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%ptr = inttoptr i64 %add to i32 *
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%val = load i32 *%ptr
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%cond = icmp ugt i32 %val, 1
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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