Tim Northover badb137729 ARM: expand atomic ldrex/strex loops in IR ... The previous situation where ATOMIC_LOAD_WHATEVER nodes were expanded at MachineInstr emission time had grown to be extremely large and involved, to account for the subtly different code needed for the various flavours (8/16/32/64 bit, cmpxchg/add/minmax). Moving this transformation into the IR clears up the code substantially, and makes future optimisations much easier: 1. an atomicrmw followed by using the *new* value can be more efficient. As an IR pass, simple CSE could handle this efficiently. 2. Making use of cmpxchg success/failure orderings only has to be done in one (simpler) place. 3. The common "cmpxchg; did we store?" idiom can be exposed to optimisation. I intend to gradually improve this situation within the ARM backend and make sure there are no hidden issues before moving the code out into CodeGen to be shared with (at least ARM64/AArch64, though I think PPC & Mips could benefit too). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205525 91177308-0d34-0410-b5e6-96231b3b80d8		2014-04-03 11:44:58 +00:00
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Analysis	Use TopTTI->getGEPCost from within getUserCost	2014-04-01 18:50:06 +00:00
AsmParser
Bitcode
CodeGen	DebugInfo: Use a 64 bit type for the subrange	2014-04-03 06:28:20 +00:00
DebugInfo
ExecutionEngine
IR	ARM: update subtarget information for Windows on ARM	2014-04-02 20:32:05 +00:00
IRReader
LineEditor
Linker
LTO	Revert "Reapply "LTO: add API to set strategy for -internalize""	2014-04-02 22:05:57 +00:00
MC	Work around gold bug http://sourceware.org/PR16794.	2014-04-02 12:15:20 +00:00
Object	Implement get getSymbolFileOffset with getSymbolAddress.	2014-04-03 03:13:33 +00:00
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ProfileData
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TableGen
Target	ARM: expand atomic ldrex/strex loops in IR	2014-04-03 11:44:58 +00:00
Transforms	Revert "[Constant Hoisting] Lazily compute the idom and cache the result."	2014-04-03 01:38:47 +00:00
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