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https://github.com/c64scene-ar/llvm-6502.git
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974a445bd9
subsequent changes are easier to review. About to fix some layering issues, and wanted to separate out the necessary churn. Also comment and sink the include of "Windows.h" in three .inc files to match the usage in Memory.inc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198685 91177308-0d34-0410-b5e6-96231b3b80d8
106 lines
3.8 KiB
C++
106 lines
3.8 KiB
C++
//===-- NVPTXMCTargetDesc.cpp - NVPTX Target Descriptions -------*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides NVPTX specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "NVPTXMCTargetDesc.h"
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#include "InstPrinter/NVPTXInstPrinter.h"
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#include "NVPTXMCAsmInfo.h"
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#include "llvm/MC/MCCodeGenInfo.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/TargetRegistry.h"
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#define GET_INSTRINFO_MC_DESC
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#include "NVPTXGenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "NVPTXGenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "NVPTXGenRegisterInfo.inc"
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using namespace llvm;
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static MCInstrInfo *createNVPTXMCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitNVPTXMCInstrInfo(X);
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return X;
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}
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static MCRegisterInfo *createNVPTXMCRegisterInfo(StringRef TT) {
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MCRegisterInfo *X = new MCRegisterInfo();
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// PTX does not have a return address register.
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InitNVPTXMCRegisterInfo(X, 0);
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return X;
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}
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static MCSubtargetInfo *
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createNVPTXMCSubtargetInfo(StringRef TT, StringRef CPU, StringRef FS) {
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MCSubtargetInfo *X = new MCSubtargetInfo();
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InitNVPTXMCSubtargetInfo(X, TT, CPU, FS);
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return X;
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}
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static MCCodeGenInfo *createNVPTXMCCodeGenInfo(
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StringRef TT, Reloc::Model RM, CodeModel::Model CM, CodeGenOpt::Level OL) {
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MCCodeGenInfo *X = new MCCodeGenInfo();
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X->InitMCCodeGenInfo(RM, CM, OL);
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return X;
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}
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static MCInstPrinter *createNVPTXMCInstPrinter(const Target &T,
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unsigned SyntaxVariant,
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const MCAsmInfo &MAI,
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const MCInstrInfo &MII,
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const MCRegisterInfo &MRI,
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const MCSubtargetInfo &STI) {
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if (SyntaxVariant == 0)
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return new NVPTXInstPrinter(MAI, MII, MRI, STI);
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return 0;
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}
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// Force static initialization.
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extern "C" void LLVMInitializeNVPTXTargetMC() {
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// Register the MC asm info.
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RegisterMCAsmInfo<NVPTXMCAsmInfo> X(TheNVPTXTarget32);
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RegisterMCAsmInfo<NVPTXMCAsmInfo> Y(TheNVPTXTarget64);
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// Register the MC codegen info.
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TargetRegistry::RegisterMCCodeGenInfo(TheNVPTXTarget32,
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createNVPTXMCCodeGenInfo);
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TargetRegistry::RegisterMCCodeGenInfo(TheNVPTXTarget64,
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createNVPTXMCCodeGenInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(TheNVPTXTarget32, createNVPTXMCInstrInfo);
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TargetRegistry::RegisterMCInstrInfo(TheNVPTXTarget64, createNVPTXMCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(TheNVPTXTarget32,
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createNVPTXMCRegisterInfo);
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TargetRegistry::RegisterMCRegInfo(TheNVPTXTarget64,
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createNVPTXMCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget32,
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createNVPTXMCSubtargetInfo);
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TargetRegistry::RegisterMCSubtargetInfo(TheNVPTXTarget64,
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createNVPTXMCSubtargetInfo);
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// Register the MCInstPrinter.
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TargetRegistry::RegisterMCInstPrinter(TheNVPTXTarget32,
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createNVPTXMCInstPrinter);
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TargetRegistry::RegisterMCInstPrinter(TheNVPTXTarget64,
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createNVPTXMCInstPrinter);
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}
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