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95eb45c5d9
R600 was using a clamped version of rsq, but SI was not. Add a new rsq_clamped intrinsic and use them consistently. It's unclear to me from the documentation what behavior the R600 instructions have, so I assume they have the legacy behavior described by the SI documents. For R600, use RECIPSQRT_IEEE for both llvm.AMDGPU.rsq.legacy and llvm.AMDGPU.rsq. R600 also has RECIPSQRT_FF, which I'm not sure how it fits in here. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@211637 91177308-0d34-0410-b5e6-96231b3b80d8
73 lines
3.0 KiB
TableGen
73 lines
3.0 KiB
TableGen
//===- IntrinsicsR600.td - Defines R600 intrinsics ---------*- tablegen -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file defines all of the R600-specific intrinsics.
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//
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//===----------------------------------------------------------------------===//
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let TargetPrefix = "r600" in {
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class R600ReadPreloadRegisterIntrinsic<string name>
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: Intrinsic<[llvm_i32_ty], [], [IntrNoMem]>,
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GCCBuiltin<name>;
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multiclass R600ReadPreloadRegisterIntrinsic_xyz<string prefix> {
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def _x : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_x")>;
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def _y : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_y")>;
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def _z : R600ReadPreloadRegisterIntrinsic<!strconcat(prefix, "_z")>;
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}
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defm int_r600_read_global_size : R600ReadPreloadRegisterIntrinsic_xyz <
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"__builtin_r600_read_global_size">;
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defm int_r600_read_local_size : R600ReadPreloadRegisterIntrinsic_xyz <
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"__builtin_r600_read_local_size">;
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defm int_r600_read_ngroups : R600ReadPreloadRegisterIntrinsic_xyz <
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"__builtin_r600_read_ngroups">;
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defm int_r600_read_tgid : R600ReadPreloadRegisterIntrinsic_xyz <
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"__builtin_r600_read_tgid">;
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defm int_r600_read_tidig : R600ReadPreloadRegisterIntrinsic_xyz <
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"__builtin_r600_read_tidig">;
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} // End TargetPrefix = "r600"
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let TargetPrefix = "AMDGPU" in {
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def int_AMDGPU_div_scale : GCCBuiltin<"__builtin_amdgpu_div_scale">,
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// 1st parameter: Numerator
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// 2nd parameter: Denominator
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// 3rd parameter: Constant to select select between first and
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// second. (0 = first, 1 = second).
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Intrinsic<[llvm_anyfloat_ty, llvm_i1_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, llvm_i1_ty],
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[IntrNoMem]>;
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def int_AMDGPU_div_fmas : GCCBuiltin<"__builtin_amdgpu_div_fmas">,
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Intrinsic<[llvm_anyfloat_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem]>;
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def int_AMDGPU_div_fixup : GCCBuiltin<"__builtin_amdgpu_div_fixup">,
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Intrinsic<[llvm_anyfloat_ty],
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[LLVMMatchType<0>, LLVMMatchType<0>, LLVMMatchType<0>],
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[IntrNoMem]>;
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def int_AMDGPU_trig_preop : GCCBuiltin<"__builtin_amdgpu_trig_preop">,
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Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>, llvm_i32_ty],
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[IntrNoMem]>;
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def int_AMDGPU_rcp : GCCBuiltin<"__builtin_amdgpu_rcp">,
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Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
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def int_AMDGPU_rsq : GCCBuiltin<"__builtin_amdgpu_rsq">,
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Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
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def int_AMDGPU_rsq_clamped : GCCBuiltin<"__builtin_amdgpu_rsq_clamped">,
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Intrinsic<[llvm_anyfloat_ty], [LLVMMatchType<0>], [IntrNoMem]>;
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} // End TargetPrefix = "AMDGPU"
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