llvm-6502/test/MC
Jim Grosbach 7b25ecf6ad ARM BL/BLX instruction fixups should use relocations.
We on the linker to resolve calls to the appropriate BL/BLX instruction
to make interworking function correctly. It uses the symbol in the
relocation to do that, so we need to be careful about being too clever.

To enable this for ARM mode, split the BL/BLX fixup kind off from the
unconditional-branch fixups.

rdar://10927209

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@151571 91177308-0d34-0410-b5e6-96231b3b80d8
2012-02-27 21:36:23 +00:00
..
ARM ARM BL/BLX instruction fixups should use relocations. 2012-02-27 21:36:23 +00:00
AsmParser
COFF Emit global ctors into .CRT$XCU instead of .ctors on Win32. Patch by Joe Groff! 2012-02-23 21:56:08 +00:00
Disassembler X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo. 2012-02-27 01:54:29 +00:00
ELF
MachO
MBlaze
Mips
X86 Updated the llvm-mc disassembler C API to support for the X86 target. 2012-02-23 18:18:17 +00:00