llvm-6502/lib/Target/PIC16/PIC16RegisterInfo.td
Sanjiv Gupta b1b5ffd827 Added a more function PIC16 backend. However to get this working a patch in
ExpandIntegerOperand (LegalizeIntegerTypes.cpp) is needed which is yet to be reworked and submitted. 


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@59617 91177308-0d34-0410-b5e6-96231b3b80d8
2008-11-19 11:00:54 +00:00

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TableGen

//===- PIC16RegisterInfo.td - PIC16 Register defs ------------*- tblgen -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
//===----------------------------------------------------------------------===//
// Declarations that describe the PIC16 register file
//===----------------------------------------------------------------------===//
class PIC16Reg<string n> : Register<n> {
let Namespace = "PIC16";
}
// PIC16 Registers.
def W : PIC16Reg<"W">;
def FSR0 : PIC16Reg<"FSR0">;
def FSR1 : PIC16Reg<"FSR1">;
def BS : PIC16Reg<"BS">;
def STATUS : PIC16Reg<"STATUS">;
// PIC16 Register classes.
def GPR : RegisterClass<"PIC16", [i8], 8, [W]>;
def FSR16 : RegisterClass<"PIC16", [i16], 8, [FSR0, FSR1]>;
def BSR : RegisterClass<"PIC16", [i8], 8, [BS]>;
def STATUSR: RegisterClass<"PIC16", [i8], 8, [STATUS]>;