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has no stores between the load and the end of block. This works great and sinks hundreds of stores, but we can't turn it on because machineinstrs don't have volatility information and we don't want to sink volatile stores :( git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45894 91177308-0d34-0410-b5e6-96231b3b80d8
255 lines
9.0 KiB
C++
255 lines
9.0 KiB
C++
//===-- MachineSink.cpp - Sinking for machine instructions ----------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This pass
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "machine-sink"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/CodeGen/MachineDominators.h"
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#include "llvm/Target/MRegisterInfo.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetMachine.h"
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#include "llvm/ADT/SmallVector.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/Compiler.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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STATISTIC(NumSunk, "Number of machine instructions sunk");
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namespace {
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class VISIBILITY_HIDDEN MachineSinking : public MachineFunctionPass {
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const TargetMachine *TM;
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const TargetInstrInfo *TII;
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MachineFunction *CurMF; // Current MachineFunction
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MachineRegisterInfo *RegInfo; // Machine register information
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MachineDominatorTree *DT; // Machine dominator tree for the current Loop
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public:
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static char ID; // Pass identification
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MachineSinking() : MachineFunctionPass((intptr_t)&ID) {}
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virtual bool runOnMachineFunction(MachineFunction &MF);
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virtual void getAnalysisUsage(AnalysisUsage &AU) const {
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MachineFunctionPass::getAnalysisUsage(AU);
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AU.addRequired<MachineDominatorTree>();
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AU.addPreserved<MachineDominatorTree>();
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}
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private:
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bool ProcessBlock(MachineBasicBlock &MBB);
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bool SinkInstruction(MachineInstr *MI, bool &SawStore);
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bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB) const;
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};
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char MachineSinking::ID = 0;
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RegisterPass<MachineSinking> X("machine-sink", "Machine code sinking");
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} // end anonymous namespace
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FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); }
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/// AllUsesDominatedByBlock - Return true if all uses of the specified register
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/// occur in blocks dominated by the specified block.
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bool MachineSinking::AllUsesDominatedByBlock(unsigned Reg,
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MachineBasicBlock *MBB) const {
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assert(MRegisterInfo::isVirtualRegister(Reg) && "Only makes sense for vregs");
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for (MachineRegisterInfo::reg_iterator I = RegInfo->reg_begin(Reg),
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E = RegInfo->reg_end(); I != E; ++I) {
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if (I.getOperand().isDef()) continue; // ignore def.
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// Determine the block of the use.
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MachineInstr *UseInst = &*I;
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MachineBasicBlock *UseBlock = UseInst->getParent();
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if (UseInst->getOpcode() == TargetInstrInfo::PHI) {
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// PHI nodes use the operand in the predecessor block, not the block with
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// the PHI.
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UseBlock = UseInst->getOperand(I.getOperandNo()+1).getMBB();
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}
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// Check that it dominates.
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if (!DT->dominates(MBB, UseBlock))
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return false;
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}
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return true;
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}
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bool MachineSinking::runOnMachineFunction(MachineFunction &MF) {
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DOUT << "******** Machine Sinking ********\n";
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CurMF = &MF;
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TM = &CurMF->getTarget();
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TII = TM->getInstrInfo();
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RegInfo = &CurMF->getRegInfo();
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DT = &getAnalysis<MachineDominatorTree>();
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bool EverMadeChange = false;
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while (1) {
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bool MadeChange = false;
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// Process all basic blocks.
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for (MachineFunction::iterator I = CurMF->begin(), E = CurMF->end();
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I != E; ++I)
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MadeChange |= ProcessBlock(*I);
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// If this iteration over the code changed anything, keep iterating.
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if (!MadeChange) break;
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EverMadeChange = true;
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}
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return EverMadeChange;
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}
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bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) {
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bool MadeChange = false;
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// Can't sink anything out of a block that has less than two successors.
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if (MBB.succ_size() <= 1) return false;
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// Walk the basic block bottom-up. Remember if we saw a store.
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bool SawStore = false;
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for (MachineBasicBlock::iterator I = MBB.end(); I != MBB.begin(); ){
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MachineBasicBlock::iterator LastIt = I;
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if (SinkInstruction(--I, SawStore)) {
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I = LastIt;
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++NumSunk;
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}
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}
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return MadeChange;
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}
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/// SinkInstruction - Determine whether it is safe to sink the specified machine
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/// instruction out of its current block into a successor.
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bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) {
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const TargetInstrDesc &TID = MI->getDesc();
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// Ignore stuff that we obviously can't sink.
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if (TID.mayStore() || TID.isCall()) {
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SawStore = true;
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return false;
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}
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if (TID.isReturn() || TID.isBranch() || TID.hasUnmodeledSideEffects())
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return false;
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// See if this instruction does a load. If so, we have to guarantee that the
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// loaded value doesn't change between the load and the end of block. The
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// check for isInvariantLoad gives the targe the chance to classify the load
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// as always returning a constant, e.g. a constant pool load.
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if (TID.mayLoad() && !TII->isInvariantLoad(MI)) {
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// Otherwise, this is a real load. If there is a store between the load and
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// end of block, we can't sink the load.
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//
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// FIXME: we can't do this transformation until we know that the load is
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// not volatile, and machineinstrs don't keep this info. :(
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//
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//if (SawStore)
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return false;
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}
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// FIXME: This should include support for sinking instructions within the
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// block they are currently in to shorten the live ranges. We often get
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// instructions sunk into the top of a large block, but it would be better to
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// also sink them down before their first use in the block. This xform has to
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// be careful not to *increase* register pressure though, e.g. sinking
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// "x = y + z" down if it kills y and z would increase the live ranges of y
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// and z only the shrink the live range of x.
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// Loop over all the operands of the specified instruction. If there is
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// anything we can't handle, bail out.
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MachineBasicBlock *ParentBlock = MI->getParent();
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// SuccToSinkTo - This is the successor to sink this instruction to, once we
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// decide.
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MachineBasicBlock *SuccToSinkTo = 0;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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if (!MO.isReg()) continue; // Ignore non-register operands.
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unsigned Reg = MO.getReg();
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if (Reg == 0) continue;
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if (MRegisterInfo::isPhysicalRegister(Reg)) {
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// If this is a physical register use, we can't move it. If it is a def,
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// we can move it, but only if the def is dead.
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if (MO.isUse() || !MO.isDead())
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return false;
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} else {
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// Virtual register uses are always safe to sink.
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if (MO.isUse()) continue;
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// FIXME: This picks a successor to sink into based on having one
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// successor that dominates all the uses. However, there are cases where
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// sinking can happen but where the sink point isn't a successor. For
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// example:
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// x = computation
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// if () {} else {}
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// use x
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// the instruction could be sunk over the whole diamond for the
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// if/then/else (or loop, etc), allowing it to be sunk into other blocks
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// after that.
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// Virtual register defs can only be sunk if all their uses are in blocks
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// dominated by one of the successors.
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if (SuccToSinkTo) {
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// If a previous operand picked a block to sink to, then this operand
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// must be sinkable to the same block.
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if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo))
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return false;
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continue;
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}
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// Otherwise, we should look at all the successors and decide which one
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// we should sink to.
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for (MachineBasicBlock::succ_iterator SI = ParentBlock->succ_begin(),
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E = ParentBlock->succ_end(); SI != E; ++SI) {
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if (AllUsesDominatedByBlock(Reg, *SI)) {
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SuccToSinkTo = *SI;
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break;
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}
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}
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// If we couldn't find a block to sink to, ignore this instruction.
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if (SuccToSinkTo == 0)
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return false;
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}
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}
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// If there are no outputs, it must have side-effects.
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if (SuccToSinkTo == 0)
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return false;
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DEBUG(cerr << "Sink instr " << *MI);
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DEBUG(cerr << "to block " << *SuccToSinkTo);
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// If the block has multiple predecessors, this would introduce computation on
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// a path that it doesn't already exist. We could split the critical edge,
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// but for now we just punt.
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// FIXME: Split critical edges if not backedges.
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if (SuccToSinkTo->pred_size() > 1) {
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DEBUG(cerr << " *** PUNTING: Critical edge found\n");
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return false;
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}
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// Determine where to insert into. Skip phi nodes.
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MachineBasicBlock::iterator InsertPos = SuccToSinkTo->begin();
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while (InsertPos != SuccToSinkTo->end() &&
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InsertPos->getOpcode() == TargetInstrInfo::PHI)
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++InsertPos;
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// Move the instruction.
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SuccToSinkTo->splice(InsertPos, ParentBlock, MI,
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++MachineBasicBlock::iterator(MI));
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return true;
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}
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