Zoran Jovanovic fc6a659676 [mips] Emit two CFI offset directives per double precision SDC1/LDC1 ... instead of just one for FR=1 registers Differential Revision: http://reviews.llvm.org/D4310 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@212769 91177308-0d34-0410-b5e6-96231b3b80d8		2014-07-10 22:23:30 +00:00
..
AArch64	AArch64: correctly fast-isel i8 & i16 multiplies	2014-07-10 14:18:46 +00:00
ARM	ARM: properly lower dllimport'ed global values	2014-07-07 05:18:35 +00:00
CPP	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Generic	Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.	2014-06-05 19:29:43 +00:00
Hexagon	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
Inputs
Mips	[mips] Emit two CFI offset directives per double precision SDC1/LDC1	2014-07-10 22:23:30 +00:00
MSP430	Reduce verbiage of lit.local.cfg files	2014-06-09 22:42:55 +00:00
NVPTX	[NVPTX] Add reflect intrinsic (better than matching by function name)	2014-06-27 18:36:11 +00:00
PowerPC	[PowerPC] Fix testcase regression	2014-07-07 19:41:54 +00:00
R600	Revert "Revert r212640, "Add trunc (select c, a, b) -> select c (trunc a), (trunc b) combine.""	2014-07-10 18:21:04 +00:00
SPARC	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
SystemZ	IR: add "cmpxchg weak" variant to support permitted failure.	2014-06-13 14:24:07 +00:00
Thumb	ARM: Fix fastcc calling convention for Thumb1	2014-06-13 08:33:03 +00:00
Thumb2	ARM: Fix TPsoft for Thumb mode	2014-06-24 15:45:59 +00:00
X86	Extend the test coverage in combine-vec-shuffle-2.ll adding some negative tests.	2014-07-10 18:59:41 +00:00
XCore	llvm/test/CodeGen/XCore/dwarf_debug.ll: Fix not to be affected by *-win32.	2014-07-04 11:58:03 +00:00