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llvm-6502/lib/Target
History
Chris Lattner bb978c7e98 remove the V8 simple isel 
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@25534 91177308-0d34-0410-b5e6-96231b3b80d8
2006-01-23 07:20:15 +00:00
..
Alpha
Add explicit #includes of <iostream>
2006-01-22 23:41:00 +00:00
CBackend
Make the C writer work with packed types. printContainedStructs is
2006-01-20 20:43:57 +00:00
IA64
die, die!! r15, you are not callee-saved
2006-01-23 06:11:45 +00:00
PowerPC
Add explicit #includes of <iostream>
2006-01-22 23:41:00 +00:00
Skeleton
Support multiple ValueTypes per RegisterClass, needed for upcoming vector
2005-12-01 04:51:06 +00:00
Sparc
remove the V8 simple isel
2006-01-23 07:20:15 +00:00
SparcV8
remove the V8 simple isel
2006-01-23 07:20:15 +00:00
SparcV9
Add explicit #includes of <iostream>
2006-01-22 23:41:00 +00:00
X86
Add explicit #includes of <iostream>
2006-01-22 23:41:00 +00:00
Makefile
DONT_BUILD_RELINKED is gone and implied by BUILD_ARCHIVE now
2005-10-24 02:26:13 +00:00
MRegisterInfo.cpp
Rename MRegisterDesc -> TargetRegisterDesc for consistency
2005-09-30 17:49:27 +00:00
SubtargetFeature.cpp
Preparation of supporting scheduling info. Need to find info based on selected
2005-10-25 15:15:28 +00:00
Target.td
New DAG node properties SNDPInFlag, SNDPOutFlag, and SNDPOptInFlag to replace
2006-01-09 18:28:21 +00:00
TargetData.cpp
Implement a new InvalidateStructLayoutInfo method and add some comments
2006-01-14 00:07:34 +00:00
TargetFrameInfo.cpp
…
TargetInstrInfo.cpp
…
TargetMachine.cpp
Remove the X86 and PowerPC Simple instruction selectors; their time has
2005-08-18 23:53:15 +00:00
TargetMachineRegistry.cpp
1. Use SubtargetFeatures in llc/lli.
2005-09-01 21:38:21 +00:00
TargetSchedInfo.cpp
…
TargetSchedule.td
add a marker
2005-10-23 22:07:20 +00:00
TargetSelectionDAG.td
bswap implementation
2006-01-14 03:14:10 +00:00
TargetSubtarget.cpp
…