llvm-6502/lib/Target/Alpha
Dan Gohman 2392efef1b Add explicit keywords.
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@72969 91177308-0d34-0410-b5e6-96231b3b80d8
2009-06-05 23:05:51 +00:00
..
AsmPrinter Rename PaddedSize to AllocSize, in the hope that this 2009-05-09 07:06:46 +00:00
Alpha.h First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
Alpha.td
AlphaBranchSelector.cpp
AlphaCodeEmitter.cpp Fix new CodeEmitter stuff to follow LLVM codying style. Patch by Aaron Gray 2009-06-01 19:57:37 +00:00
AlphaInstrFormats.td
AlphaInstrInfo.cpp Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaInstrInfo.h Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaInstrInfo.td Add an int64_t variant of abs, for host environments 2009-05-13 00:24:22 +00:00
AlphaISelDAGToDAG.cpp Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaISelLowering.cpp Convert Alpha and Mips to use a MachineFunctionInfo subclass to 2009-06-03 20:30:14 +00:00
AlphaISelLowering.h
AlphaJITInfo.cpp First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
AlphaJITInfo.h First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
AlphaLLRP.cpp
AlphaMachineFunctionInfo.h Add explicit keywords. 2009-06-05 23:05:51 +00:00
AlphaRegisterInfo.cpp
AlphaRegisterInfo.h
AlphaRegisterInfo.td
AlphaRelocations.h
AlphaSchedule.td
AlphaSubtarget.cpp
AlphaSubtarget.h Propagate CPU string out of SubtargetFeatures 2009-05-23 19:50:50 +00:00
AlphaTargetAsmInfo.cpp
AlphaTargetAsmInfo.h
AlphaTargetMachine.cpp First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
AlphaTargetMachine.h First patch in the direction of splitting MachineCodeEmitter in two subclasses: 2009-05-30 20:51:52 +00:00
CMakeLists.txt
Makefile
README.txt

***

add gcc builtins for alpha instructions


***

custom expand byteswap into nifty 
extract/insert/mask byte/word/longword/quadword low/high
sequences

***

see if any of the extract/insert/mask operations can be added

***

match more interesting things for cmovlbc cmovlbs (move if low bit clear/set)

***

lower srem and urem

remq(i,j):  i - (j * divq(i,j)) if j != 0
remqu(i,j): i - (j * divqu(i,j)) if j != 0
reml(i,j):  i - (j * divl(i,j)) if j != 0
remlu(i,j): i - (j * divlu(i,j)) if j != 0

***

add crazy vector instructions (MVI):

(MIN|MAX)(U|S)(B8|W4) min and max, signed and unsigned, byte and word
PKWB, UNPKBW pack/unpack word to byte
PKLB UNPKBL pack/unpack long to byte
PERR pixel error (sum accross bytes of bytewise abs(i8v8 a - i8v8 b))

cmpbytes bytewise cmpeq of i8v8 a and i8v8 b (not part of MVI extentions)

this has some good examples for other operations that can be synthesised well 
from these rather meager vector ops (such as saturating add).
http://www.alphalinux.org/docs/MVI-full.html